Verilog Digital System Design: RT Level Synthesis, Testbench and Verification - Couverture rigide

Navabi, Zainalabedin

Couverture rigide

ISBN 10 : 0071445641 ISBN 13 : 9780071445641

Editeur : McGraw-Hill Professional, 2005

Synopsis

This rigorous text shows electronics designers and students how to deploy Verilog in sophisticated digital systems design.The Second Edition is completely updated -- along with the many worked examples -- for Verilog 2001, new synthesis standards and coverage of the new OVI verification library.

A propos du livre

À propos de l?auteur

Zainalabedin Navabi, Ph.D., navabi@ece.neu.edu, is adjunct professor of electrical and computer engineering at Northeastern University and the author of both editions of VDHL: Analysis and Modeling of Digital Systems, published by McGraw-Hill. Since 1981, Dr. Navabi has worked in the design, definition and implementation of hardware description languages and the synthesis and testing of digital systems. He has developed and supervised the development of many HDL-related software packages and tools, and has directed projects in VLSI design, test synthesis, simulation, synthesis, and other aspects of digital system automation. He has served as a consultant for several EDA companies developing HDL based tools and environments. Dr. Navabi is a member of ACM, IEEE, IEEE computer society, and an active participant in IEEE DASC committee that sets standards related to hardware description languages

Détails de l'édition

• Éditeur: McGraw-Hill Professional
• Date d'édition: 2005
• ISBN 10: 0071445641
• ISBN 13: 9780071445641
• Reliure: Relié
• Langue: anglais
• Numéro d'édition: 2
• Nombre de pages: 384