A VHDL Primer: Revised Edition - Couverture rigide

Bhasker, Jayaram

Couverture rigide

ISBN 10 : 0131814478 ISBN 13 : 9780131814479

Editeur : Prentice Hall, 1994

Synopsis

VHDL is an IEE standard as well as an ANSI standard language for describing digital designs - but is a large and verbose language with many complex constructs that have complex semantic meaning, and is difficult to understand initially. This primer - updated to include the new standard just released by the IEEE - uses a subset of the language to introduce VHDL to readers at the beginner's level. It explains the complex constructs of the language using an example-based approach.

A propos du livre

Présentation de l'éditeur

The power of VHDL-without the complexity!

Want to leverage VHDL's remarkable power without bogging down in its notorious complexity? Get A VHDL Primer, Third Edition. This up-to-the-minute introduction to VHDL focuses on the features you need to get results-with extensive practical examples so you can start writing VHDL models immediately.

Written by Jayaram Bhasker, one of the world's leading VHDL course developers, this best-selling guide has been completely updated to reflect the popular IEEE STD_LOGIC_1164 package. With Bhasker's help, you'll master all these key VHDL techniques:

• Behavioral, dataflow and structural modeling.
• Generics and configurations.
• Subprograms and overloading.
• Packages and libraries.
• Model simulation.
• Advanced features: Entity statements, generate statements, aliases, guarded signals, attributes, aggregate targets, and more.

The book's extensive hardware modeling coverage includes modeling of regular structures, delays, conditional operations, state machines, Moore and Mealy FSMs, clock dividers and much more. You'll find new coverage of text I/O and test benches, as well as complete listings of the IEEE TD_LOGIC_1164 package. J. Bhasker has helped tens of thousands of professionals master VHDL. With A VHDL Primer, Third Edition, it's your turn to succeed.

Biographie de l'auteur

J. Bhasker (Ph.D., University of Minnesota) is a member of the Technical Staff at AT&T Bell Laboratories, Allentown, PA, where he is currently working on a high-level synthesis tool that would synthesize net-lists from C or VHDL behavioral descriptions. He teaches courses on VHDL and VHDL Synthesis to internal AT&T designers as well as at Lehigh University. He is the author of A VHDL Primer (Prentice Hall) and numerous professional papers and articles. Dr. Bhasker has served as Program Committee member and session chair for the VHDL International Users Forum and was the recipient of the Honeywell Excel Pioneer Award (1987).

Détails de l'édition

• Éditeur: Prentice Hall
• Date d'édition: 1994
• ISBN 10: 0131814478
• ISBN 13: 9780131814479
• Reliure: Relié
• Langue: anglais
• Nombre de pages: 324
• Coordonnées du fabricant: non disponible