Showing how to design multiprocessor computer systems that are streamlined for multimedia applications, this work presents architectures and design methodologies for parallel systems in embedded DSP applications. It describes unique techniques for optimizing communication and synchronization and provides several examples of practical applications that demonstrate the relevance of the techniques presented. This second edition updates the background material on existing embedded multiprocessors, including single-chip multiprocessors. It also summarizes the new research on dataflow models for signal processing that has been carried out since the publication of the first edition.
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Sundararajan Sriram, Shuvra S. Bhattacharyya
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Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Sundararajan Sriram, Shuvra S. BhattacharyyaTechniques for Optimizing Multiprocessor Implementations of Signal Processing ApplicationsAn indispensable component of the information age, signal processing is embedded in a variet. N° de réf. du vendeur 595375155
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Paperback. Etat : new. Paperback. Techniques for Optimizing Multiprocessor Implementations of Signal Processing ApplicationsAn indispensable component of the information age, signal processing is embedded in a variety of consumer devices, including cell phones and digital television, as well as in communication infrastructure, such as media servers and cellular base stations. Multiple programmable processors, along with custom hardware running in parallel, are needed to achieve the computation throughput required of such applications. Reviews important research in key areas related to the multiprocessor implementation of multimedia systemsEmbedded Multiprocessors: Scheduling and Synchronization, Second Edition presents architectures and design methodologies for parallel systems in embedded digital signal processing (DSP) applications. It discusses application modeling techniques for multimedia systems, the incorporation of interprocessor communication costs into multiprocessor scheduling decisions, and a modeling methodology (the synchronization graph) for multiprocessor system performance analysis. The book also applies the synchronization graph model to develop hardware and software optimizations that can significantly reduce the interprocessor communication overhead of a given schedule.Chronicles recent activity dealing with single-chip multiprocessors and dataflow modelsThis edition updates the background material on existing embedded multiprocessors, including single-chip multiprocessors. It also summarizes the new research on dataflow models for signal processing that has been carried out since the publication of the first edition.Harness the power of multiprocessorsThis book explores the optimization of interprocessor communication and synchronization in embedded multiprocessor systems. It shows you how to design multiprocessor computer systems that are streamlined for multimedia applications. Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability. N° de réf. du vendeur 9781138114173
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