Description du livre Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Strict limitations on power dissipation must be met by the designer while still meeting ever higher computation. N� de r�f. du vendeur 4194194

Plus d'informations sur ce vendeur | Contacter le vendeur

Acheter neuf

EUR 136,16

Autre devise

Ajouter au panier

Frais de port : EUR 48,99

De Allemagne vers Etats-Unis

Destinations, frais et d�lais

Image fournie par le vendeur

Low Power Digital CMOS Design

Robert W. Brodersen

Edit� par Springer US (2012)

ISBN 10 : 1461359848 ISBN 13 : 9781461359845

Neuf Taschenbuch Quantit� disponible : 1

Vendeur :

AHA-BUCH GmbH
(Einbeck, Allemagne)

Evaluation vendeur

Evaluation du vendeur :

Description du livre Taschenbuch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Strict limitations on power dissipation must be met by the designer while still meeting ever higher computational requirements. A comprehensive approach is thus required at all levels of system design, ranging from algorithms and architectures to the logic styles and the underlying technology. Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation. Architectural optimization enables supply voltages of the order of 1 V using standard CMOS technology. Several techniques can also be used to minimize the switched capacitance, including representation, optimizing signal correlations, minimizing spurious transitions, optimizing sequencing of operations, activity-driven power down, etc. The high- efficiency of DC-DC converter circuitry required for efficient, low-voltage and low-current level operation is described by Stratakos, Sullivan and Sanders. The application of various low-power techniques to a chip set for multimedia applications shows that orders-of-magnitude reduction in power consumption is possible. The book also features an analysis by Professor Meindl of the fundamental limits of power consumption achievable at all levels of the design hierarchy. Svensson, of ISI, describes emerging adiabatic switching techniques that can break the CV2f barrier and reduce the energy per computation at a fixed voltage. Srivastava, of AT&T, presents the application of aggressive shut-down techniques to microprocessor applications. N� de r�f. du vendeur 9781461359845

Plus d'informations sur ce vendeur | Contacter le vendeur

Acheter neuf

EUR 168,27

Autre devise

Ajouter au panier

Frais de port : EUR 32,99

De Allemagne vers Etats-Unis

Destinations, frais et d�lais

Image fournie par le vendeur

Low Power Digital CMOS Design

Robert W. Brodersen

Edit� par Springer US Okt 2012 (2012)

ISBN 10 : 1461359848 ISBN 13 : 9781461359845

Neuf Taschenbuch Quantit� disponible : 2

impression � la demande

Vendeur :

BuchWeltWeit Ludwig Meier e.K.
(Bergisch Gladbach, Allemagne)

Evaluation vendeur

Evaluation du vendeur :

Description du livre Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Strict limitations on power dissipation must be met by the designer while still meeting ever higher computational requirements. A comprehensive approach is thus required at all levels of system design, ranging from algorithms and architectures to the logic styles and the underlying technology. Potentially one of the most important techniques involves combining architecture optimization with voltage scaling, allowing a trade-off between silicon area and low-power operation. Architectural optimization enables supply voltages of the order of 1 V using standard CMOS technology. Several techniques can also be used to minimize the switched capacitance, including representation, optimizing signal correlations, minimizing spurious transitions, optimizing sequencing of operations, activity-driven power down, etc. The high- efficiency of DC-DC converter circuitry required for efficient, low-voltage and low-current level operation is described by Stratakos, Sullivan and Sanders. The application of various low-power techniques to a chip set for multimedia applications shows that orders-of-magnitude reduction in power consumption is possible. The book also features an analysis by Professor Meindl of the fundamental limits of power consumption achievable at all levels of the design hierarchy. Svensson, of ISI, describes emerging adiabatic switching techniques that can break the CV2f barrier and reduce the energy per computation at a fixed voltage. Srivastava, of AT&T, presents the application of aggressive shut-down techniques to microprocessor applications. 424 pp. Englisch. N� de r�f. du vendeur 9781461359845

Plus d'informations sur ce vendeur | Contacter le vendeur

Acheter neuf

EUR 181,85

Autre devise

Ajouter au panier

Frais de port : EUR 23

De Allemagne vers Etats-Unis

Destinations, frais et d�lais

Articles li�s � Low Power Digital Cmos Design

Low Power Digital Cmos Design - Couverture souple

Chandrakasan, Anantha P.; Brodersen, Robert W.

Acheter neuf

Autres �ditions populaires du m�me titre

Edition pr�sent�e

Meilleurs r�sultats de recherche sur AbeBooks

Low Power Digital CMOS Design by Chandrakasan, Anantha P., Brodersen, Robert W. [Paperback ]

Low Power Digital CMOS Design

Low Power Digital CMOS Design

Low Power Digital CMOS Design

Low Power Digital CMOS Design

Low Power Digital CMOS Design