Articles liés à Low-Power High-Resolution Analog to Digital Converters:...
Low-Power High-Resolution Analog to Digital Converters: Design, Test and Calibration - Couverture souple
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Synopsis
Forword. Abbrevations. Symbols.
1. Introduction. 1.1. A/D Conversion Systems. 1.2. Remarks on Curent Design and Debugging Practice. 1.3. Motivation. 1.4. Organization.
2. Analog to Digital Conversion. 2.1. High-Speed High-Resolution A/D Converter Architectural Choices. 2.2. Notes on Low Voltage A/D Converter Design. 2.3. A/D Converter Building Blocks. 2.4. A/D Converters: Summary.
3. Design of Multi-Step Analog to Digital Converters. 3.1. Multi-Step A/D Converter Architecture. 3.2. Deisgn Considerations for Non-Ideal Multi-Step A/D Converter. 3.3. Time-Interleaved Front-End Sample-and-Hold Circuit. 3.4. Multi-Step A/D Converter Stage Design. 3.5. Inter-Stage Design and Calibration. 3.6. Experimental Results. 3.7. Conclusion.
4. Multi-Step Analog to Digital Converter Testing. 4.1. Analog ATPG for Quasi-Static Structural Test. 4.2. Design for Testability Concept. 4.3. On-Chip Stimulus Generation for BIST Applications. 4.4. Remarks on Built-In Self-Test Concepts. 4.5. Stochastic Analysis of Deep-Submicron CMOS Process. 4.5. Conclusion.
5. Multi-Step Analog to Digital Converter Debugging. 5.1. Concept of Sensor Networks. 5.2. Estimation of Die-Level Process Variations. 5.3. Debugging of Multi-Step A/D Converter Stages. 5.4. DfT for Full Accessability of Multi-Step Converters. 5.5. Debugging of Time-Interleaved Systems. 5.6. Foreground Calibration. 5.7. Experimental Results. 5.8. Conclusion.
6. Conclusions and Recommendations. 6.1. Summary of Results. 6.3. Recommendations and Future Research.
Appendix. References. Index.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
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