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Edité par Springer, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : ThriftBooks-Dallas, Dallas, TX, Etats-Unis
Livre
Hardcover. Etat : Good. No Jacket. Pages can have notes/highlighting. Spine may show signs of wear. ~ ThriftBooks: Read More, Spend Less 1.1.
Edité par Springer US, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : Buchpark, Trebbin, Allemagne
Livre
Etat : Sehr gut. Zustand: Sehr gut - Gepflegter, sauberer Zustand. Außen: verschmutzt, zerkratzt. Aus der Auflösung einer renommierten Bibliothek. Kann Stempel beinhalten. | ISBN/EAN: 079238184x[Sonstiges] | Sprache: Englisch.
Edité par Springer US Jun 1998, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
Livre impression à la demande
Buch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Formal Equivalence Checking and Design Debugging covers two major topics in design verification: logic equivalence checking and design debugging. The first part of the book reviews the design problems that require logic equivalence checking and describes the underlying technologies that are used to solve them. Some novel approaches to the problems of verifying design revisions after intensive sequential transformations such as retiming are described in detail. The second part of the book gives a thorough survey of previous and recent literature on design error diagnosis and design error correction. This part also provides an in-depth analysis of the algorithms used in two logic debugging software programs, ErrorTracer and AutoFix, developed by the authors. From the Foreword: `With the adoption of the static sign-off approach to verifying circuit implementations the application-specific integrated circuit (ASIC) industry will experience the first radical methodological revolution since the adoption of logic synthesis. Equivalence checking is one of the two critical elements of this methodological revolution. This book is timely for either the designer seeking to better understand the mechanics of equivalence checking or for the CAD researcher who wishes to investigate well-motivated research problems such as equivalence checking of retimed designs or error diagnosis in sequential circuits.' Kurt Keutzer, University of California, Berkeley 252 pp. Englisch.
Edité par Springer, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : booksXpress, Bayonne, NJ, Etats-Unis
Livre
Hardcover. Etat : new.
Edité par Springer, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : GreatBookPrices, Columbia, MD, Etats-Unis
Livre
Etat : New.
Edité par Springer, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : Lucky's Textbooks, Dallas, TX, Etats-Unis
Livre
Etat : New.
Edité par Springer US, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : moluna, Greven, Allemagne
Livre impression à la demande
Gebunden. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Formal Equivalence Checking and Design Debugging covers two major topics in design verification: logic equivalence checking and design debugging. The first part of the book reviews the design problems that require logic equivalence checking and .
Edité par Springer, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : Ria Christie Collections, Uxbridge, Royaume-Uni
Livre impression à la demande
Etat : New. PRINT ON DEMAND Book; New; Fast Shipping from the UK. No. book.
Edité par Springer, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : GreatBookPricesUK, Castle Donington, DERBY, Royaume-Uni
Livre
Etat : New.
Edité par Springer US, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
Livre
Buch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - Formal Equivalence Checking and Design Debugging covers two major topics in design verification: logic equivalence checking and design debugging. The first part of the book reviews the design problems that require logic equivalence checking and describes the underlying technologies that are used to solve them. Some novel approaches to the problems of verifying design revisions after intensive sequential transformations such as retiming are described in detail. The second part of the book gives a thorough survey of previous and recent literature on design error diagnosis and design error correction. This part also provides an in-depth analysis of the algorithms used in two logic debugging software programs, ErrorTracer and AutoFix, developed by the authors. From the Foreword: `With the adoption of the static sign-off approach to verifying circuit implementations the application-specific integrated circuit (ASIC) industry will experience the first radical methodological revolution since the adoption of logic synthesis. Equivalence checking is one of the two critical elements of this methodological revolution. This book is timely for either the designer seeking to better understand the mechanics of equivalence checking or for the CAD researcher who wishes to investigate well-motivated research problems such as equivalence checking of retimed designs or error diagnosis in sequential circuits.' Kurt Keutzer, University of California, Berkeley.
Edité par Springer, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : GreatBookPrices, Columbia, MD, Etats-Unis
Livre
Etat : As New. Unread book in perfect condition.
Edité par Springer, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : GreatBookPricesUK, Castle Donington, DERBY, Royaume-Uni
Livre
Etat : As New. Unread book in perfect condition.
Edité par Kluwer Academic Publishers, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : Kennys Bookshop and Art Galleries Ltd., Galway, GY, Irlande
Livre
Etat : New. Covers the topics of logic equivalence checking and design debugging in design verification. This book reviews the design problems that require logic equivalence checking and describes the underlying technologies that are used to solve them. It also gives a survey of the literature on design error diagnosis and design error correction. Series: Frontiers in Electronic Testing. Num Pages: 247 pages, biography. BIC Classification: UM. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate. Dimension: 234 x 156 x 15. Weight in Grams: 1170. . 1998. Hardback. . . . .
Edité par Kluwer Academic Publishers, 1998
ISBN 10 : 079238184XISBN 13 : 9780792381846
Vendeur : Kennys Bookstore, Olney, MD, Etats-Unis
Livre
Etat : New. Covers the topics of logic equivalence checking and design debugging in design verification. This book reviews the design problems that require logic equivalence checking and describes the underlying technologies that are used to solve them. It also gives a survey of the literature on design error diagnosis and design error correction. Series: Frontiers in Electronic Testing. Num Pages: 247 pages, biography. BIC Classification: UM. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate. Dimension: 234 x 156 x 15. Weight in Grams: 1170. . 1998. Hardback. . . . . Books ship from the US and Ireland.