ASIC and FPGA Verification: A Guide to Component Modeling - Couverture rigide

Munden, Richard

 
9780125105811: ASIC and FPGA Verification: A Guide to Component Modeling

Synopsis

Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today s digital designs. ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system. It is a valuable resource for any designer who simulates multi-chip digital designs.

Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.

À propos de l?auteur

By Richard Munden

Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.