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Book by Yeo KiatSeng Rofail Samir S Goh WangLing
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The complete guide to CMOS/BiCMOS ULSI and GSI for every circuit design professional.
Today's engineers must build devices that are more portable, more reliable, and more cost-effective than ever before. To this end, power has become a crucial consideration in ultra-large-scale-integration (ULSI) and giga-scale integration (GSI) engineering. BiCMOS technology now represents the optimal solution for a wide range of advanced applications. In this book, three of the field's leaders present in-depth coverage of the latest developments in CMOS/BiCMOS ULSI design—including thorough analyses of the fabrication technologies needed to realize low-voltage, low-power CMOS/BiCMOS structures.
Unlike previous books, CMOS/BICMOS ULSI covers low-voltage, low-power circuit design from all perspectives, including process integration, device modeling, and characterization. Coverage includes:
BiCMOS combines the low-power dissipation and high packing density of CMOS with the high speed and high output drive of bipolar devices. Using this book's state-of-the-art design techniques, you can leverage BiCMOS to its fullest advantage.
KIAT-SENG YEO joined the School of Electrical and Electronic Engineering (EEE), Nanyang Technological University (NTU), Singapore in 1993. He is now the Sub-Dean of EEE, Principal Investigator of NTU's Integrated Circuit Technology Research Group, Program Manager of the System-on-Chip Flagship Project, Coordinator of the Integrated Circuit Design Research Group, Technical Chairman of the 8th and 9th International Symposium on Integrated Circuits, Devices and Systems, and a Technical Consultant. He holds six patents and published more than 100 articles in BiCMOS/CMOS integrated circuit design and technology.
SAMIR S. ROFAIL has been a teacher, researcher, and consultant in semiconductor and IC design for 20 years. From 1992 to 1999, he coordinated NTU's IC-Design group, leading intensive research on low-voltage, low-power BiCMOS/CMOS circuits. He is now a technical consultant in Waterloo, Canada.
WANG-LING GOH joined NTU in 1996. Her research interests are in the areas of silicon processing technologies, particularly the SOI structures, CMP and Copper. She holds one patent and has published over 30 articles in the above named areas.
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