Starter's Guide to Verilog 2001 - Couverture souple

Ciletti, Michael

Couverture souple

ISBN 10 : 0131415565 ISBN 13 : 9780131415560

Editeur : Pearson, 2004

Synopsis

For undergraduate courses in Advanced Digital Logic and Advanced Digital Design in departments of electrical engineering, computer engineering, and computer science.

Introducing the Verilog HDL in a brief format, this text presents a selected set of the changes the popular hardware underwent in its first revision―emerging as IEEE Std 1364-2001 or Verilog-2001. It addresses the main features that support the design of combinational and sequential logic, and emphasizes synthesizable models, with a limited discussion of the theoretical framework for synthesis.

A propos du livre

Présentation de l'éditeur

For undergraduate courses in Advanced Digital Logic and Advanced Digital Design in departments of electrical engineering, computer engineering, and computer science.

Introducing the Verilog HDL in a brief format, this text presents a selected set of the changes the popular hardware underwent in its first revision―emerging as IEEE Std 1364-2001 or Verilog-2001. It addresses the main features that support the design of combinational and sequential logic, and emphasizes synthesizable models, with a limited discussion of the theoretical framework for synthesis.

Détails de l'édition

• Éditeur: Pearson
• Date d'édition: 2004
• Langue: anglais
• ISBN 10: 0131415565
• ISBN 13: 9780131415560
• Reliure: Broché
• Numéro d'édition: 1
• Nombre de pages: 256
• Coordonnées du fabricant: non disponible
• Personne responsable: Riccardo Bacigalupo; riccardo.bacigalupo@sanoma.it; ; Sanoma Italia Via Arconati, 1 �; Milano; 20135; Italie