For undergraduate courses in Advanced Digital Logic and Advanced Digital Design in departments of electrical engineering, computer engineering, and computer science. Introducing the Verilog HDL in a brief format, this text presents a selected set of the changes the popular hardware underwent in its first revision-emerging as IEEE Std 1364-2001 or Verilog-2001. It addresses the main features that support the design of combinational and sequential logic, and emphasizes synthesizable models, with a limited discussion of the theoretical framework for synthesis.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
For undergraduate courses in Advanced Digital Logic and Advanced Digital Design in departments of electrical engineering, computer engineering, and computer science.
Introducing the Verilog HDL in a brief format, this text presents a selected set of the changes the popular hardware underwent in its first revision―emerging as IEEE Std 1364-2001 or Verilog-2001. It addresses the main features that support the design of combinational and sequential logic, and emphasizes synthesizable models, with a limited discussion of the theoretical framework for synthesis.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
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