The Art of Analog Layout.: 2nd Edition - Couverture souple

Hastings, Alan

Couverture souple

ISBN 10 : 0131464108 ISBN 13 : 9780131464100

Editeur : Pearson, 2005

Synopsis

Verbal explanations are favored over mathematical formulas, graphs are kept to a minimum, and line drawings are used in this user-friendly book. Clear guidance and advice are provided for those professionals who lay out analog circuits. KEY TOPICS: Matching of resistors and capacitors: Includes causes of mismatch, particularly the hydrogen effect and package shift. MOS Transistors: Covers a brief history of floating gate devices, EPROM and EEPROM. Applications of MOS transistors: Expands information on failure mechanisms, including BVdss/Bvdii, SILC, NBTI/PTBI and GIDL and the difference between electrical and electrothermal SOA. Consideration of failure mechanisms as crucial to layout: Integrates further information into many chapters covering various devices. Standard bipolar, polygate CMOS and analog BiCMOS: Covers all three fundamental processes. MARKET: A valuable reference for professional layout designers.

A propos du livre

Quatrième de couverture

Based on the author's extensive experience as a circuit designer and a layout designer, The Art of Analog Layout takes a practical and authoritative perspective, providing the reader with broad coverage of the issues involved in successfully laying out analog integrated circuits. Topics range from the mechanics of layout to essential information about many related areas, such as device physics, processing failure modes and effects, device operation, parasitics, and matching. The emphasis throughout is on practical knowledge.

• Written for layout designers, the mathematics is kept to a minimum, requiring only a familiarity with basic algebra and elementary electronics.
• Provides a carrier-based model for understanding device operation.
• Focuses on three processes: standard bipolar, polysilicon-gate CMOS, and analog BICMOS, enabling the reader to comprehend most new processes.
• Discusses the ways in which variations in layout geometries affect the performance of devices fabricated in silicon.
• Many exercises can be completed using pencil and paper for those who do not have access to layout editing software.

Présentation de l'éditeur

For Electrical Engineering courses in analog layout or professional layout designers.

This text covers the issues involved in successfully laying out analog integrated circuits. Hastings provides clear guidance and does not stress theoretical physics or mathematical analysis of layouts. He emphasizes cross- sections of devices and carrier-based models of device operation as compared to the more common geometric and schematic representation of devices.

Détails de l'édition

• Éditeur: Pearson
• Date d'édition: 2005
• Langue: anglais
• ISBN 10: 0131464108
• ISBN 13: 9780131464100
• Reliure: Broché
• Numéro d'édition: 2
• Nombre de pages: 672
• Coordonnées du fabricant: non disponible
• Personne responsable: Riccardo Bacigalupo; riccardo.bacigalupo@sanoma.it; ; Sanoma Italia Via Arconati, 1 �; Milano; 20135; Italie