Verilog Digital Computer Design: Algorithms Into Hardware - Couverture rigide

Arnold, Mark

Couverture rigide

ISBN 10 : 0136392539 ISBN 13 : 9780136392538

Editeur : Prentice Hall, 1998

Synopsis

Book by Arnold Mark

A propos du livre

Quatrième de couverture :

63925-2

Verilog Digital Computer Design: Algorithms to Hardware

Shorten time to market with Verilog HDL

Real-world Verilog design, start-to-finish

The most productive way to design complex digital and computer systems is to understand them as algorithms and code them in implicit style Verilog, using Verilog's non-blocking assignment features. In this book, award-winning Verilog expert Mark Gord on Arnold shows how, introducing a top-down approach that leverages the ASM charts most digital designers are already familiar with. Throughout, you'll learn practical techniques that enable earlier debugging, automatic conversion of source code into hardware, and shorter time to market.

• Understand the fundamental goals, structure and behavior of Verilog.
• Discover how to use ASMs as the “master plan” for digital design.
• Walk through the three stages of Verilog design: behavioral, mixed and structural.
• Learn Verilog simulation techniques for Mealy machines and bottom-testing loops.
• Use Verilog gate level techniques to model propagation delay.
• Leverage special-purpose design techniques to build general-purpose processors.

Arnold demonstrates a powerful new approach that automatically synthesizes a one-hot design directly from implicit style Verilog. He also introduces the elegant ARM instruction set as a way of exploring RISC design with implicit Verilog and ASMs. From start to finish, Verilog Digital Computer Design: Algorithms to Hardware is more than a great guide to Verilog: it's a primer on the enduring concepts of computer design that will apply no matter which tools you choose.

Présentation de l'éditeur :

For introductory-level courses in Verilog Hardware Description Language. Written by the co-developer of the Verilog Implicit To One hot (VITO) preprocessor, this text introduces the industry standard Verilog Hardware Description Language as a new way to explore enduring concepts in digital and computer design, such as pipelining. It shows how Verilog simulation is a tool for uncovering bugs prior to hardware fabrication, and how Verilog synthesis is a tool for automatically converting source code into hardware. Ideal for designers new to Verilog, it features a consistent design framework using ASM charts, and contains many realistic, practical examples.

À propos de cette édition

• Éditeur: Prentice Hall
• Date d'édition: 1998
• ISBN 10: 0136392539
• ISBN 13: 9780136392538
• Reliure: Relié
• Nombre de pages: 640