Advances in Computers, Volume 124 presents updates on innovations in computer hardware, software, theory, design and applications, with this updated volume including new chapters on Traffic-Load-Aware Virtual Channel Power-gating in Network-on-Chips, An Efficient DVS Scheme for On-chip Networks, A Power-Performance Balanced Network-on-Chip for Mixed CPU-GPU Systems, Routerless Networks-on-Chip, Routing Algorithm Design for Power- and Temperature-Aware NoCs, Approximate Communication for Energy-Efficient Network-on-Chip, Power-Efficient NoC Design by Partial Topology Reconfiguration, The Design of a Deflection-based Energy-efficient On-chip Network, and Power-Gating in Networks-on-Chip.
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Suyel Namasudra has received Ph.D. degree from the National Institute of Technology Silchar, Assam, India. He was a post-doctorate fellow at the International University of La Rioja (UNIR), Spain. Currently, Dr. Namasudra is working as an assistant professor in the Department of Computer Science and Engineering at the National Institute of Technology Agartala, Tripura, India. Before joining the National Institute of Technology Agartala, Dr. Namasudra was an assistant professor in the Department of Computer Science and Engineering at the National Institute of Technology Patna, Bihar, India. His research interests include blockchain technology, cloud computing, DNA computing, and information security. Dr. Namasudra has edited 7 books, 5 patents, and 85 publications in conference proceedings, book chapters, and refereed journals like IEEE TII, IEEE TCE, IEEE T-ITS, IEEE TSC, IEEE TCSS, IEEE TCBB, ACM TOMM, ACM TOSN, ACM TALLIP, FGCS, CAEE, and many more. He is the Editor-in-Chief of the Cloud Computing and Data Science (ISSN: 2737-4092 (online)) journal. Dr. Namasudra has served as a Lead Guest Editor/Guest Editor in many reputed journals like IEEE TCE (IEEE, IF: 4.3), IEEE TBD (IEEE, IF: 7.2), ACM TOMM (ACM, IF: 3.144), MONET (Springer, IF: 3.426), CAEE (Elsevier, IF: 3.818), CAIS (Springer, IF: 4.927), CMC (Tech Science Press, IF: 3.772), Sensors (MDPI, IF: 3.576), and many more. He has also participated in many international conferences as an organizer and session chair. Dr. Namasudra is a senior member of IEEE, and a member of ACM and IEI. He has been featured in the list of the top 2% scientists in the world in 2021, 2022, and 2023. His h-index is 37.
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Buch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Advances in Computers, Volume 124 presents updates on innovations in computer hardware, software, theory, design and applications, with this updated volume including new chapters on Traffic-Load-Aware Virtual Channel Power-gating in Network-on-Chips, An Efficient DVS Scheme for On-chip Networks, A Power-Performance Balanced Network-on-Chip for Mixed CPU-GPU Systems, Routerless Networks-on-Chip, Routing Algorithm Design for Power- and Temperature-Aware NoCs, Approximate Communication for Energy-Efficient Network-on-Chip, Power-Efficient NoC Design by Partial Topology Reconfiguration, The Design of a Deflection-based Energy-efficient On-chip Network, and Power-Gating in Networks-on-Chip. Englisch. N° de réf. du vendeur 9780323856881
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Buch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Advances in Computers, Volume 124 presents updates on innovations in computer hardware, software, theory, design and applications, with this updated volume including new chapters on Traffic-Load-Aware Virtual Channel Power-gating in Network-on-Chips, An Efficient DVS Scheme for On-chip Networks, A Power-Performance Balanced Network-on-Chip for Mixed CPU-GPU Systems, Routerless Networks-on-Chip, Routing Algorithm Design for Power- and Temperature-Aware NoCs, Approximate Communication for Energy-Efficient Network-on-Chip, Power-Efficient NoC Design by Partial Topology Reconfiguration, The Design of a Deflection-based Energy-efficient On-chip Network, and Power-Gating in Networks-on-Chip. N° de réf. du vendeur 9780323856881
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