This book provides an exciting and challenging laboratory component for an undergraduate digital logic design class. The more advanced topics and exercises are also appropriate for an upper level course in digital logic or embedded systems. The goal of this text is to introduce fully integrated modern CAD tools, logic simulation, logic synthesis using hardware description languages, design hierarchy, current generation field programmable gate array (FPGA) technology, and SOPC design in the laboratory portion of the course. Even student laboratory projects can now implement entire digital and computer systems with hundreds of thousands of gates.
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RAPID PROTOTYPING OF DIGITAL SYSTEMS provides an exciting and challenging environment for rapidly adapting System-on-a-Programmable Chip (SOPC) technology to existing designs or integrating the new design methods into a laboratory component for digital logic, computer and embedded-design curriculums.
New to this edition is an introduction to embedded operating systems for SOPC designs.
Featuring four accelerated tutorials on the Quartus II and Nios II design environments, this edition progresses from introductory programmable logic to full-scale SOPC design seamlessly integrating hardware implementation, software development, operating system support, state-of-the-art I/O, and IP cores.
This edition features Altera's new 7.1 Quartus II CAD and Nios II SOPC tools and includes projects for Altera's DE1, DE2, UP3, UP2, and UP1 FPGA development boards.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
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