Failure Modes and Mechanisms in Electronic Packages - Couverture rigide

Singh, P.; Viswanadham, Puligandla

Couverture rigide

ISBN 10 : 0412105918 ISBN 13 : 9780412105913

Editeur : Chapman and Hall, 1997

Synopsis

Those of us who grew up in the "through-hole" age of electronic packaging are probably more amazed and appreciative than are our children at the incredible growth of electronic performance capability. My son, an electrical engineering student, seems almost to take for granted the innovations that leave me somewhat awestruck at times. Electronic circuit designers delight in packing more punch into less volume, while reminding us that their job has become increasingly challenging. The lay person also has learned from the media that the industry has been working wonders in shrinking the transistor and expanding the power of "the chip. " Much attention is focussed on the silicon and on the marvelous production and entertainment tools we now see in our offices and homes. Between the silicon and the end product lies the less publicized world of circuit-level packaging. We leave it to a cadre of technologists to take the schematics and parts lists and to develop the processes that tum the designers' concepts into physical reality. And while the silicon transistor is shrinking, the engineering challenges of packaging multiple chips and associated components into increasingly dense subsystems are growing. Further, the transistor may have to function without failure through severe industrial or military environments over the lifetime of the product.

Détails de l'édition

• Éditeur: Chapman and Hall
• Date d'édition: 1997
• Langue: anglais
• ISBN 10: 0412105918
• ISBN 13: 9780412105913
• Reliure: Relié
• Nombre de pages: 391
• Coordonnées du fabricant: KINESIS; https://www.also.com/ec/cms5/en_6000/6000/index.jsp; ; Friedrich-Karl-Str. 9; Hamburg; 22391; Allemagne