Verilog Coding for Logic Synthesis - Couverture rigide

Lee, Weng Fook

Couverture rigide

ISBN 10 : 0471429767 ISBN 13 : 9780471429760

Editeur : Wiley-Interscience, 2003

Synopsis

Provides a practical approach to Verilog design and problem solving.
* Bulk of the book deals with practical design problems that design engineers solve on a daily basis.
* Includes over 90 design examples.
* There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification.
* Book is suitable for use as a textbook in EE departments that have VLSI courses

A propos du livre

À propos de l?auteur

WENG FOOK LEE is a prominent member of the Technical Staff (MTS) at Advanced Micro Devices (AMD) Design Center. He has vast experience in designing with Verilog and VHDL, and is an acknowledged expert in the field of RTL coding and logic synthesis. Lee is an expert at synthesizing and tweaking design synthesis, and in developing and implementing new logic verification, synthesis, auto-place-route, and back-annotation design methodology. He has experience in the design and synthesis of PCI, ISA and LPC bridges, chipsets, microcontrollers, RISC microprocessors, and state-of-the-art, high-speed, low-power flash memory.

Détails de l'édition

• Éditeur: Wiley-Interscience
• Date d'édition: 2003
• Langue: anglais
• ISBN 10: 0471429767
• ISBN 13: 9780471429760
• Reliure: Relié
• Numéro d'édition: 1
• Nombre de pages: 336
• Coordonnées du fabricant: non disponible
• Personne responsable: non disponible