The increasingly demanding performance requirements of communications systems, as well as problems posed by the continued scaling of silicon technology, present numerous challenges for the design of frequency synthesizers in modern transceivers. This book contains everything you need to know for the efficient design of frequency synthesizers for today's communications applications. If you need to optimize performance and minimize design time, you will find this book invaluable. Using an intuitive yet rigorous approach, the authors describe simple analytical methods for the design of phase locked loop (PLL) frequency synthesizers using scaled silicon CMOS and bipolar technologies. The entire design process, from system-level specification to layout, is covered comprehensively. Practical design examples are included, and implementation issues are addressed. A key problem-solving resource for practitioners in IC design, the book will also be of interest to researchers and graduate students in electrical engineering.
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Andrea Lacaita is a professor of electronics and Head of the Microelectronics Laboratory, at the Politecnico di Milano, Italy. His research interests have included optical systems for IC testing, phase noise in integrated LC-tuned oscillators and novel architectures of frequency synthesizers. During his career, he was also a Visiting Scientist at AT&T Bell Laboratories in New Jersey. He is a Senior member of the IEEE.
Salvatore Levantino is an assistant professor at the Politecnico di Milano, Italy, where he teaches a course on integrated radio systems. His research interests have included noise generation mechanisms in oscillators, low-noise coupled oscillators and IF-sampling receiver architectures. In 2001, he worked for a year at Agere Systems (formerly Bell Laboratories) in New Jersey.
Carlo Samori is an associate professor at the Politecnico di Milano, Italy, where his research is focused on the analysis and design of integrated circuits for communications in bipolar and CMOS technologies. He has been a consultant for the Communication Circuit Research Department at Lucent Technologies, Bell Laboratories, since 1997.
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Hardcover. Etat : new. Hardcover. The increasingly demanding performance requirements of communications systems, as well as problems posed by the continued scaling of silicon technology, present numerous challenges for the design of frequency synthesizers in modern transceivers. This book contains everything you need to know for the efficient design of frequency synthesizers for today's communications applications. If you need to optimize performance and minimize design time, you will find this book invaluable. Using an intuitive yet rigorous approach, the authors describe simple analytical methods for the design of phase locked loop (PLL) frequency synthesizers using scaled silicon CMOS and bipolar technologies. The entire design process, from system-level specification to layout, is covered comprehensively. Practical design examples are included, and implementation issues are addressed. A key problem-solving resource for practitioners in IC design, the book will also be of interest to researchers and graduate students in electrical engineering. Key problem-solving resource covering the entire design process - from system-level specification to layout - of PLL frequency synthesizers for today's communications applications. Ideal for optimizing performance and minimizing design time. With practical design examples, this book is invaluable for practitioners in IC design, and researchers and graduate students in electrical engineering. This item is printed on demand. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. N° de réf. du vendeur 9780521863155
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