The Verilog Tm Hardware Description Language - Couverture rigide

Thomas, Donald E.

Couverture rigide

ISBN 10 : 0792381661 ISBN 13 : 9780792381662

Editeur : Kluwer Academic Publishers, 1998

Synopsis

This is a revised edition of a standard text, which presents the language through examples illustrating the important styles of representation, including: structural models, behavioural models of combinational and sequential circuits for logic synthesis, FSM-datapath models, and cycle-accurate descriptions. A chapter on behavioural synthesis presents the use of cycle-accurate descriptions with these tools. This text can be used as a useful resource for engineers and students interested in describing, simulating, and synthesizing digital systems. The order of coverage of representation styles matches typical introductory courses (structural, synthesizable, FSM-datapath, cycle-accurate). An appendix with a tutorial workbook style is keyed into the introduction. For architecture courses, modelling of simple pipelined processors is presented. The pack includes a CD-ROM containing the VeriwellTM Verilog simulator, the Synplicity TM Synplify TM FPGA synthesis software, examples from the book in text and PDF format, and lecture slides in PDF format. Usage of the synthesis tool is time-limited; directions for obtaining an extended licence are provided. The simulator and synthesis tools are available for several platforms.

Détails de l'édition

• Éditeur: Kluwer Academic Publishers
• Date d'édition: 1998
• Langue: anglais
• ISBN 10: 0792381661
• ISBN 13: 9780792381662
• Reliure: Relié
• Numéro d'édition: 4
• Nombre de pages: 376
• Coordonnées du fabricant: non disponible
• Personne responsable: CMN Printpool Inh. Mathis Neumann; https://www.also.com/ec/cms5/en_6000/6000/index.jsp; ; Friedrich-Karl-Str. 9; Hamburg; Allemagne