Integrated circuit densities and operating speeds continue to rise at an exponential rate. Chips, however, cannot get larger and faster without a sharp decrease in power consumption beyond the current levels. Minimization of power consumption in VLSI chips has thus become an important design objective. In fact, with the explosive growth in demand for portable electronics and the usual push toward more complex functionality and higher performance, power consumption has in many cases become the limiting factor in satisfying the market demand.
A new generation of power-conscious CAD tools are coming onto the market to help designers estimate, optimize and verify power consumption levels at most stages of the IC design process. These tools are especially prevalent at the register-transfer level and below. There is a great need for similar tools and capabilities at the behavioral and system levels of the design process. Many researchers and CAD tool developers are working on high-level power modeling and estimation, as well as power-constrained high-level synthesis and optimization. Techniques and tools alone are, however, insufficient to optimize VLSI circuit power dissipation - a consistent and convergent design methodology is also required.
Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods was written to address some of the key problems in power analysis and optimization early in the design process. In particular, this book focuses on power macro-modeling based on regression analysis and power minimization through behavioral transformations, scheduling, resource assignment and hardware/software partitioning and mapping. What differentiates this book from other published work on the subject is the mathematical basis and formalism behind the algorithms and the optimality of these algorithms subject to the stated assumptions.
From the Foreword:
`This book makes animportant contribution to the field of system design technologies by presenting a set of algorithms with guaranteed optimality properties, that can be readily applied to system-level design. This contribution is timely, because it fills the need of new methods for a new design tool generation, which supports the design of electronic systems with even more demanding requirements'.
Giovanni De Micheli, Professor, Stanford University
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
Vendeur : CONTINENTAL MEDIA & BEYOND, Ocala, FL, Etats-Unis
Hardcover. Etat : Used: Good. 1999 hardcover no dj as issued xlibrary copy withdrawn stamp on edge of pages/ in book clean text Kluwer Academic Publ. 167 pages::: J-14. N° de réf. du vendeur 0814ICVAG0P
Quantité disponible : 1 disponible(s)
Vendeur : PsychoBabel & Skoob Books, Didcot, Royaume-Uni
hardcover. Etat : Very Good. Etat de la jaquette : No Dust Jacket. Name from previous owner on FEP. Instances of moderate surface wear including a small scratched mark on upper from cover. Otherwise binding is well preserved. No dust jacket. Pages are clean and crisp, and printing is tight, clean and bright throughout. MB. Used. N° de réf. du vendeur 248181
Quantité disponible : 1 disponible(s)
Vendeur : Lucky's Textbooks, Dallas, TX, Etats-Unis
Etat : New. N° de réf. du vendeur ABLIING23Feb2416190185367
Quantité disponible : Plus de 20 disponibles
Vendeur : GreatBookPrices, Columbia, MD, Etats-Unis
Etat : New. N° de réf. du vendeur 757742-n
Quantité disponible : Plus de 20 disponibles
Vendeur : California Books, Miami, FL, Etats-Unis
Etat : New. N° de réf. du vendeur I-9780792385608
Quantité disponible : Plus de 20 disponibles
Vendeur : Ria Christie Collections, Uxbridge, Royaume-Uni
Etat : New. In. N° de réf. du vendeur ria9780792385608_new
Quantité disponible : Plus de 20 disponibles
Vendeur : GreatBookPricesUK, Woodford Green, Royaume-Uni
Etat : New. N° de réf. du vendeur 757742-n
Quantité disponible : Plus de 20 disponibles
Vendeur : Books Puddle, New York, NY, Etats-Unis
Etat : New. pp. 196. N° de réf. du vendeur 263070715
Quantité disponible : 4 disponible(s)
Vendeur : moluna, Greven, Allemagne
Gebunden. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Integrated circuit densities and operating speeds continue to rise at an exponential rate. Chips, however, cannot get larger and faster without a sharp decrease in power consumption beyond the current levels. Minimization of power consumption in VLSI chi. N° de réf. du vendeur 5970996
Quantité disponible : Plus de 20 disponibles
Vendeur : Kennys Bookshop and Art Galleries Ltd., Galway, GY, Irlande
Etat : New. Designed to address some of the problems in power analysis and optimization early in the design process. This book focuses on power macro-modeling based on regression analysis and power minimization through behavioral transformations, scheduling, resource assignment and hardware/software partitioning and mapping. Num Pages: 167 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational; (XV) Technical / Manuals. Dimension: 235 x 155 x 12. Weight in Grams: 1000. . 1999. Hardback. . . . . N° de réf. du vendeur V9780792385608
Quantité disponible : 15 disponible(s)