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9780792393139: High-Level Synthesis for Real-Time Digital Signal Processing

Synopsis

High-Level Synthesis for Real-Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the implementation of these methods in the CATHEDRAL-II compiler.
The emergence of independent silicon foundries, the reduced price of silicon real estate and the shortened processing turn-around time bring silicon technology within reach of system houses. Even for low volumes, digital systems on application-specific integrated circuits (ASICs) are becoming an economically meaningful alternative for traditional boards with analogue and digital commodity chips.
ASICs cover the application region where inefficiencies inherent to general-purpose components cannot be tolerated. However, full-custom handcrafted ASIC design is often not affordable in this competitive market. Long design times, a high development cost for a low production volume, the lack of silicon designers and the lack of suited design facilities are inherent difficulties to manual full-custom chip design.
To overcome these drawbacks, complex systems have to be integrated in ASICs much faster and without losing too much efficiency in silicon area and operation speed compared to handcrafted chips. The gap between system design and silicon design can only be bridged by new design (CAD). The idea of a silicon compiler, translating a behavioural system specification directly into silicon, was born from the awareness that the ability to fabricate chips is indeed outrunning the ability to design them. At this moment, CAD is one order of magnitude behind schedule. Conceptual CAD is the keyword to mastering the design complexity in ASIC design and the topic of this book.

Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.

  • ÉditeurSpringer
  • Date d'édition1993
  • ISBN 10 0792393139
  • ISBN 13 9780792393139
  • ReliureRelié
  • Langueanglais
  • Nombre de pages302
  • Coordonnées du fabricantnon disponible

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Jan Vanhoof, Karl van Rompaey, Hugo De Man, Gert Goossens, Ivo Bolsens
Edité par Springer US, 1993
ISBN 10 : 0792393139 ISBN 13 : 9780792393139
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Etat : Gut. Zustand: Gut | Seiten: 310 | Sprache: Englisch | Produktart: Bücher. N° de réf. du vendeur 1654333/3

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Jan Vanhoof, Karl van Rompaey, Ivo Bolsens, Gert Goosens et Hugo de Man
Edité par Springer, 1993
ISBN 10 : 0792393139 ISBN 13 : 9780792393139
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Hardcover. Etat : Bon. Ancien livre de bibliothèque. Légères traces d'usure sur la couverture. Edition 1993. Ammareal reverse jusqu'à 15% du prix net de cet article à des organisations caritatives. ENGLISH DESCRIPTION Book Condition: Used, Good. Former library book. Slight signs of wear on the cover. Edition 1993. Ammareal gives back up to 15% of this item's net price to charity organizations. N° de réf. du vendeur E-065-937

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Vanhoof, Jan; Van Rompaey, Karl; Bolsens, Ivo; De Man, Hugo; Goossens, Gert
ISBN 10 : 0792393139 ISBN 13 : 9780792393139
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Vanhoof, Jan; Van Rompaey, Karl; Bolsens, Ivo; De Man, Hugo; Goossens, Gert
ISBN 10 : 0792393139 ISBN 13 : 9780792393139
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hardcover. Etat : Very Good. Etat de la jaquette : No Dust Jacket. Name from previous owner on first page. Minor bumps to the ends of the spine. Inside, pages are clean and crisp, and printing is tight, clean and bright throughout. MB. Used. N° de réf. du vendeur 247967

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Vanhoof, Jan; Van Rompaey, Karl; Bolsens, Ivo; Goossens, Gert; De Man, Hugo
Edité par Springer, 1993
ISBN 10 : 0792393139 ISBN 13 : 9780792393139
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Jan Vanhoof|Karl Van Rompaey|Ivo Bolsens|Gert Goossens|Hugo De Man
Edité par Springer US, 1993
ISBN 10 : 0792393139 ISBN 13 : 9780792393139
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Gebunden. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. High-Level Synthesis for Real-Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the im. N° de réf. du vendeur 5971402

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Jan Vanhoof
Edité par Springer US Jan 1993, 1993
ISBN 10 : 0792393139 ISBN 13 : 9780792393139
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Buch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -High-Level Synthesis for Real-Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the implementation of these methods in the CATHEDRAL-II compiler. The emergence of independent silicon foundries, the reduced price of silicon real estate and the shortened processing turn-around time bring silicon technology within reach of system houses. Even for low volumes, digital systems on application-specific integrated circuits (ASICs) are becoming an economically meaningful alternative for traditional boards with analogue and digital commodity chips. ASICs cover the application region where inefficiencies inherent to general-purpose components cannot be tolerated. However, full-custom handcrafted ASIC design is often not affordable in this competitive market. Long design times, a high development cost for a low production volume, the lack of silicon designers and the lack of suited design facilities are inherent difficulties to manual full-custom chip design. To overcome these drawbacks, complex systems have to be integrated in ASICs much faster and without losing too much efficiency in silicon area and operation speed compared to handcrafted chips. The gap between system design and silicon design can only be bridged by new design (CAD). The idea of a silicon compiler, translating a behavioural system specification directly into silicon, was born from the awareness that the ability to fabricate chips is indeed outrunning the ability to design them. At this moment, CAD is one order of magnitude behind schedule. Conceptual CAD is the keyword to mastering the design complexity in ASIC design and the topic of this book. 310 pp. Englisch. N° de réf. du vendeur 9780792393139

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Vanhoof, Jan; Van Rompaey, Karl; Bolsens, Ivo; Goossens, Gert; De Man, Hugo
Edité par Springer, 1993
ISBN 10 : 0792393139 ISBN 13 : 9780792393139
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Jan Vanhoof
ISBN 10 : 0792393139 ISBN 13 : 9780792393139
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Buch. Etat : Neu. Neuware -High-Level Synthesis for Real-Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the implementation of these methods in the CATHEDRAL-II compiler.The emergence of independent silicon foundries, the reduced price of silicon real estate and the shortened processing turn-around time bring silicon technology within reach of system houses. Even for low volumes, digital systems on application-specific integrated circuits (ASICs) are becoming an economically meaningful alternative for traditional boards with analogue and digital commodity chips.ASICs cover the application region where inefficiencies inherent to general-purpose components cannot be tolerated. However, full-custom handcrafted ASIC design is often not affordable in this competitive market. Long design times, a high development cost for alow production volume, the lack of silicon designers and the lack of suited design facilities are inherent difficulties to manual full-custom chip design.To overcome these drawbacks, complex systems have to be integrated in ASICs much faster and without losing too much efficiency in silicon area and operation speed compared to handcrafted chips. The gap between system design and silicon design can only be bridged by new design (CAD). The idea of a silicon compiler, translating a behavioural system specification directly into silicon, was born from the awareness that the ability to fabricate chips is indeed outrunning the ability to design them. At this moment, CAD is one order of magnitude behind schedule. Conceptual CAD is the keyword to mastering the design complexity in ASIC design and the topic of this book.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 310 pp. Englisch. N° de réf. du vendeur 9780792393139

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Jan Vanhoof
Edité par Springer US, Springer US, 1993
ISBN 10 : 0792393139 ISBN 13 : 9780792393139
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Buch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - High-Level Synthesis for Real-Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the implementation of these methods in the CATHEDRAL-II compiler. The emergence of independent silicon foundries, the reduced price of silicon real estate and the shortened processing turn-around time bring silicon technology within reach of system houses. Even for low volumes, digital systems on application-specific integrated circuits (ASICs) are becoming an economically meaningful alternative for traditional boards with analogue and digital commodity chips. ASICs cover the application region where inefficiencies inherent to general-purpose components cannot be tolerated. However, full-custom handcrafted ASIC design is often not affordable in this competitive market. Long design times, a high development cost for alow production volume, the lack of silicon designers and the lack of suited design facilities are inherent difficulties to manual full-custom chip design. To overcome these drawbacks, complex systems have to be integrated in ASICs much faster and without losing too much efficiency in silicon area and operation speed compared to handcrafted chips. The gap between system design and silicon design can only be bridged by new design (CAD). The idea of a silicon compiler, translating a behavioural system specification directly into silicon, was born from the awareness that the ability to fabricate chips is indeed outrunning the ability to design them. At this moment, CAD is one order of magnitude behind schedule. Conceptual CAD is the keyword to mastering the design complexity in ASIC design and the topic of this book. N° de réf. du vendeur 9780792393139

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