Verilog by Example: A Concise Introduction for FPGA Design - Couverture souple

Readler, Blaine

 
9780983497301: Verilog by Example: A Concise Introduction for FPGA Design
Couverture souple
ISBN 10 : 0983497303 ISBN 13 : 9780983497301
Editeur : Full ARC Press, 2011

Synopsis

A practical primer for the student and practicing engineer already familiar with the basics of digital design, the reference develops a working grasp of the verilog hardware description language step-by-step using easy-to-understand examples. Starting with a simple but workable design sample, increasingly more complex fundamentals of the language are introduced until all major features of verilog are brought to light. Included in the coverage are state machines, modular design, FPGA-based memories, clock management, specialized I/O, and an introduction to techniques of simulation. The goal is to prepare the reader to design real-world FPGA solutions. All the sample code used in the book is available online. What Strunk and White did for the English language with "The Elements of Style," VERILOG BY EXAMPLE does for FPGA design.

Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.

Éditeur
Full ARC Press
Date d'édition
2011
Langue
anglais
ISBN 10 
0983497303
ISBN 13 
9780983497301
Reliure
Broché
Nombre de pages
124
Coordonnées du fabricant
non disponible
Personne responsable
non disponible