Accelerators for Convolutional Neural Networks
Comprehensive and thorough resource exploring different types of convolutional neural networks and complementary accelerators
Accelerators for Convolutional Neural Networks provides basic deep learning knowledge and instructive content to build up convolutional neural network (CNN) accelerators for the Internet of things (IoT) and edge computing practitioners, elucidating compressive coding for CNNs, presenting a two-step lossless input feature maps compression method, discussing arithmetic coding -based lossless weights compression method and the design of an associated decoding method, describing contemporary sparse CNNs that consider sparsity in both weights and activation maps, and discussing hardware/software co-design and co-scheduling techniques that can lead to better optimization and utilization of the available hardware resources for CNN acceleration.
The first part of the book provides an overview of CNNs along with the composition and parameters of different contemporary CNN models. Later chapters focus on compressive coding for CNNs and the design of dense CNN accelerators. The book also provides directions for future research and development for CNN accelerators.
Other sample topics covered in Accelerators for Convolutional Neural Networks include:
For researchers in AI, computer vision, computer architecture, and embedded systems, along with graduate and senior undergraduate students in related programs of study, Accelerators for Convolutional Neural Networks is an essential resource to understanding the many facets of the subject and relevant applications.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
ARSLAN MUNIR, PhD, is an Associate Professor in the Department of Computer Science of Kansas State University. He is also the Director of the Intelligent Systems, Computer Architecture, Analytics, and Security (ISCAAS) Laboratory at the university.
JOONHO KONG, PhD, is an Associate Professor in the School of Electronics Engineering College of IT Engineering at Kyungpook National University, South Korea.
MAHMOOD AZHAR QURESHI, PhD, is a Senior IP Logic Design Engineer at Intel Corporation in Santa Clara, California.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
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