Articles liés à Low-Voltage Cmos Log Companding Analog Design
Synopsis
Low-Voltage CMOS Log Companding Analog Design presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies. The proposed strategy is mainly based on two bases: the Instantaneous Log Companding Theory, and the MOSFET operating in the subthreshold region. The former allows inner compression of the voltage dynamic-range for very low-voltage operation, while the latter is compatible with CMOS technologies and suitable for low-power circuits. The required background on the specific modeling of the MOS transistor for Companding is supplied at the beginning. Following this general approach, a complete set of CMOS basic building blocks is proposed and analyzed for a wide variety of analog signal processing. In particular, the covered areas include: amplification and AGC, arbitrary filtering, PTAT generation, and pulse duration modulation (PDM). For each topic, several case studies areconsidered to illustrate the design methodology. Also, integrated examples in 1.2um and 0.35um CMOS technologies are reported to verify the good agreement between design equations and experimental data. The resulting analog circuit topologies exhibit very low-voltage (i.e. 1V) and low-power (few tenths of uA) capabilities. Apart from these specific design examples, a real industrial application in the field of hearing aids is also presented as the main demonstrator of all the proposed basic building blocks. This system-on-chip exhibits true 1V operation, high flexibility through digital programmability and very low-power consumption (about 300uA including the Class-D amplifier). As a result, the reported ASIC can meet the specifications of a complete family of common hearing aid models. In conclusion, this book is addressed to both industry ASIC designers who can apply its contents to the synthesis of very low-power systems-on-chip in standard CMOS technologies, as wellas to the teachers of modern circuit design in electronic engineering.
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Low-Voltage CMOS Log Companding Analog Design (The Springer International Series in Engineering and Computer Science) Serra-Graells, Francisco; Rueda, Adoración and Huertas, José L.
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Springer, 2003
ISBN 10 : 140207445X
ISBN 13 : 9781402074455
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Etat : Used: Good. 2003 hardcover no dj as issued xlibrary copy withdrawn stamp on edge of pages/ in book clean text Kluwer Academi Publ. 192 pages::: J-13. N° de réf. du vendeur 0811IA438R7
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Low-Voltage Cmos Log Companding Analog Design
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Low-Voltage CMOS Log Companding Analog Design (Hardcover)
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Kluwer Academic Publishers, New York, NY, 2003
ISBN 10 : 140207445X
ISBN 13 : 9781402074455
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Hardcover. Etat : new. Hardcover. This work presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies. The proposed strategy is mainly based on two bases: the Instantaneous Log Companding Theory, and the MOSFET operating in the subthreshold region. The former allows inner compression of the voltage dynamic-range for very low-voltage operation, while the latter is compatible with CMOS technologies and suitable for low-power circuits. The required background on the specific modelling of the MOS transistor for Companding is supplied at the beginning. Following this general approach, a complete set of CMOS basic building blocks are proposed and analysed for a wide variety of analog signal processing. In particular, the covered areas include: amplification and AGC, arbitrary filtering, PTAT generation, and pulse duration modulation (PDM). For each topic, several case studies are considered to illustrate the design methodology. Also, integrated examples in 1.2mm and 0.35mm CMOS technologies are reported to verify the good agreement between design equations and experimental data.The resulting analog circuit topologies exhibit very low-voltage (1V) and low-power (few tenths of mA) capabilities. Apart from these specific design examples, a real industrial application in the field of hearing aids is also presented as the main demonstrator of all the proposed basic building blocks. This system-on-chip exhibits true 1V operation, high flexibility through digital programmability and very low-power consumption (about 300mA including the Class-D amplifier). As a result, the reported ASIC can meet the specifications of a complete family of common hearing aid models. In conclusion, this book is addressed to both, industry ASIC designers who can apply its contents to the synthesis of very low-power systems-on-chip in standard CMOS technologies, as well as to the teachers of modern circuit design in electronic engineering. Low-Voltage CMOS Log Companding Analog Design presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. N° de réf. du vendeur 9781402074455
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Low-Voltage CMOS Log Companding Analog Design (The Springer International Series in Engineering and Computer Science, 733)
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Low-Voltage Cmos Log Companding Analog Design
Edité par
Springer, 2003
ISBN 10 : 140207445X
ISBN 13 : 9781402074455
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Vendeur : GreatBookPrices, Columbia, MD, Etats-Unis
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Low-Voltage CMOS Log Companding Analog Design (The Springer International Series in Engineering and Computer Science, 733)
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Low-Voltage Cmos Log Companding Analog Design
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Low-Voltage CMOS Log Companding Analog Design
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Springer US Jun 2003, 2003
ISBN 10 : 140207445X
ISBN 13 : 9781402074455
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Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
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Buch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Low-Voltage CMOS Log Companding Analog Design presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies. The proposed strategy is mainly based on two bases: the Instantaneous Log Companding Theory, and the MOSFET operating in the subthreshold region. The former allows inner compression of the voltage dynamic-range for very low-voltage operation, while the latter is compatible with CMOS technologies and suitable for low-power circuits. The required background on the specific modeling of the MOS transistor for Companding is supplied at the beginning. Following this general approach, a complete set of CMOS basic building blocks is proposed and analyzed for a wide variety of analog signal processing. In particular, the covered areas include: amplification and AGC, arbitrary filtering, PTAT generation, and pulse duration modulation (PDM). For each topic, several case studies are considered to illustrate the design methodology. Also, integrated examples in 1.2um and 0.35um CMOS technologies are reported to verify the good agreement between design equations and experimental data. The resulting analog circuit topologies exhibit very low-voltage (i.e. 1V) and low-power (few tenths of uA) capabilities. Apart from these specific design examples, a real industrial application in the field of hearing aids is also presented as the main demonstrator of all the proposed basic building blocks. This system-on-chip exhibits true 1V operation, high flexibility through digital programmability and very low-power consumption (about 300uA including the Class-D amplifier). As a result, the reported ASIC can meet the specifications of a complete family of common hearing aid models. In conclusion, this book is addressed to both industry ASIC designers who can apply its contents to the synthesis of very low-power systems-on-chip in standard CMOS technologies, as well as to the teachers of modern circuit design in electronic engineering. 220 pp. Englisch. N° de réf. du vendeur 9781402074455
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Low-Voltage CMOS Log Companding Analog Design
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Gebunden. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Low-Voltage CMOS Log Companding Analog Design presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies. The proposed strategy is mainly based on two bases. N° de réf. du vendeur 4095082
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Low-Voltage Cmos Log Companding Analog Design
Edité par
Springer, 2003
ISBN 10 : 140207445X
ISBN 13 : 9781402074455
Ancien ou d'occasion
Couverture rigide
Vendeur : GreatBookPricesUK, Woodford Green, Royaume-Uni
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Etat : As New. Unread book in perfect condition. N° de réf. du vendeur 1823233
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