Systemverilog for Design: A Guide to Using Systemverilog for Hardware Design and Modeling - Couverture rigide

Sutherland, Stuart; Davidmann, Simon; Flake, Peter

Couverture rigide

ISBN 10 : 1402075308 ISBN 13 : 9781402075308

Editeur : Springer-Verlag New York Inc., 2003

Synopsis

SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL based design. First, modeling very large designs with concise, accurate, and intuitive code. Second, writing high-level test programs to efficiently and effectively verify these large designs. This book, "SystemVerilog for Design", addresses the first aspect of the SystemVerilog extensions to Verilog. Important modeling features are presented, such as two-state data types, enumerated types, user-defined types, structures, unions, and interfaces. Emphasis is placed on the proper usage of these enhancements for simulation and synthesis. A companion to this book, "SystemVerilog for Verification", covers the second aspect of SystemVerilog.

Détails de l'édition

• Éditeur: Springer-Verlag New York Inc.
• Date d'édition: 2003
• Langue: anglais
• ISBN 10: 1402075308
• ISBN 13: 9781402075308
• Reliure: Relié
• Nombre de pages: 402
• Coordonnées du fabricant: non disponible
• Personne responsable: CMN Printpool Inh. Mathis Neumann; https://www.also.com/ec/cms5/en_6000/6000/index.jsp; ; Friedrich-Karl-Str. 9; Hamburg; Allemagne