Designing Reliable and Efficient Networks on Chips - Couverture rigide

Murali, Srinivasan

Couverture rigide

ISBN 10 : 1402097565 ISBN 13 : 9781402097560

Editeur : Springer-Verlag New York Inc., 2009

Synopsis

The book provides state-of-the-art methods to solve some of the most important problems encountered during NoC design. It is the first book to present in depth the state-of-the-art algorithms and optimization models for performing system-level design of NoCs.

A propos du livre

À propos de l'auteur

Dr. Srinivasan Murali is a co-founder and CTO of iNoCs and a research scientist at the Ecole Polytechnique Fédérale de Lausanne (EPFL), Switzerland. He received the MS and PhD degrees in Electrical Engineering from Stanford University in 2007. His research interests include interconnect design for Systems on Chips, with particular emphasis on developing CAD tools and design methods for Networks on Chips. His interests also include thermal modeling and reliability of multi-core systems. He has been actively involved in several conferences (such as DATE, CODES-ISSS, NoC symposium, VLSI-SoC) as a program committee member/session chair and is a reviewer for many leading conferences and journals. He is a recipient of the EDAA outstanding dissertation award for 2007 for his work on interconnect architecture design. He received a best paper award at the DATE 2005 conference and a best paper nomination at the ICCAD 2006 conference.

One of his papers has also been selected as one of "The Most Influential Papers of 10 Years DATE". He has over 30 publications in leading conferences and journals in this field.

Détails de l'édition

• Éditeur: Springer-Verlag New York Inc.
• Date d'édition: 2009
• Langue: anglais
• ISBN 10: 1402097565
• ISBN 13: 9781402097560
• Reliure: Relié
• Nombre de pages: 208
• Coordonnées du fabricant: Springer Nature Customer Service Center GmbH; ProductSafety@springernature.com; ; Europaplatz 3,69115 Heidelberg, Germany; Heidelberg; 69115; Allemagne