Articles liés à Clock Generators for SOC Processors: Circuits and Architectu...
Synopsis
This book explores the design of fully-integrated frequency synthesizers suitable for system-on-a-chip (SOC) processors. The text takes a more global design perspective in jointly examining the design space at the circuit level as well as at the architectural level. The comprehensive coverage includes summary chapters on circuit theory as well as feedback control theory relevant to the operation of phase locked loops (PLLs). On the circuit level, the discussion includes low-voltage analog design in deep submicron digital CMOS processes, effects of supply noise, substrate noise, as well device noise. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discrete-time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. The book provides numerous real world applications, as well as practical rules-of-thumb for modern designers to use at the system, architectural, as well as the circuit level.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
À propos de l?auteur
Amr M. Fahim received his B.A.Sc, M.A.Sc, and Ph.D degrees from the University of Waterloo in Computer Engineering in 1996 and Electrical Engineering in 1997 and 2000, respectively. In 2000 he joined Qualcomm Inc., where he is currently working on the development of mixed-signal designs. He is the author of over 20 papers and 5 patents in this area, and has been a reviewer for the IEEE Journal of Solid-State Circuits and IEEE Transactions on Circuits and Systems II.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
- ÉditeurSpringer
- Date d'édition2010
- ISBN 10 1441954708
- ISBN 13 9781441954701
- ReliureBroché
- Langueanglais
- Numéro d'édition1
- Nombre de pages264
- Coordonnées du fabricantnon disponible
Acheter neuf
Afficher cet article
EUR 92,27
EUR 9,70 expédition depuis Allemagne vers France
Destinations, frais et délaisRésultats de recherche pour Clock Generators for SOC Processors: Circuits and Architectu...
Image fournie par le vendeur
Clock Generators for SOC Processors
impression à la demandeVendeur : moluna, Greven, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Explores problems in the design of fully-integrated frequency synthesizers suitable for system-on-a-chip (SOC) processorsComprehensive coverage includes summary chapters on circuit theory as well as feedback control theoryDisc. N° de réf. du vendeur 4175790
Quantité disponible : Plus de 20 disponibles
Image fournie par le vendeur
Clock Generators for SOC Processors
impression à la demandeVendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book examines the issue of design of fully integrated frequency synthesizers suitable for system-on-a-chip (SOC) processors. This book takes a more global design perspective in jointly examining the design space at the circuit level as well as at the architectural level. The coverage of the book is comprehensive and includes summary chapters on circuit theory as well as feedback control theory relevant to the operation of phase locked loops (PLLs). On the circuit level, the discussion includes low-voltage analog design in deep submicron digital CMOS processes, effects of supply noise, substrate noise, as well device noise. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discre- time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. The material then develops into detailed circuit and architectural analysis of specific clock generation blocks. This includes circuits and architectures of PLLs with high power supply noise immunity and digital PLL architectures where the loop filter is digitized. Methods of generating low-spurious sampling clocks for discrete-time analog blocks are then examined. This includes sigma-delta fractional-N PLLs, Direct Digital Synthesis (DDS) techniques and non-conventional uses of PLLs. Design for test (DFT) issues as they arise in PLLs are then discussed. This includes methods of accurately measuring jitter and built-in-self-test (BIST) techniques for PLLs. 264 pp. Englisch. N° de réf. du vendeur 9781441954701
Quantité disponible : 2 disponible(s)
Image fournie par le vendeur
Clock Generators for SOC Processors : Circuits and Architectures
Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Taschenbuch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - This book examines the issue of design of fully integrated frequency synthesizers suitable for system-on-a-chip (SOC) processors. This book takes a more global design perspective in jointly examining the design space at the circuit level as well as at the architectural level. The coverage of the book is comprehensive and includes summary chapters on circuit theory as well as feedback control theory relevant to the operation of phase locked loops (PLLs). On the circuit level, the discussion includes low-voltage analog design in deep submicron digital CMOS processes, effects of supply noise, substrate noise, as well device noise. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discre- time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. The material then develops into detailed circuit and architectural analysis of specific clock generation blocks. This includes circuits and architectures of PLLs with high power supply noise immunity and digital PLL architectures where the loop filter is digitized. Methods of generating low-spurious sampling clocks for discrete-time analog blocks are then examined. This includes sigma-delta fractional-N PLLs, Direct Digital Synthesis (DDS) techniques and non-conventional uses of PLLs. Design for test (DFT) issues as they arise in PLLs are then discussed. This includes methods of accurately measuring jitter and built-in-self-test (BIST) techniques for PLLs. N° de réf. du vendeur 9781441954701
Quantité disponible : 1 disponible(s)
Image fournie par le vendeur
Clock Generators for SOC Processors
Edité par
Springer US, Springer US Nov 2010, 2010
ISBN 10 : 1441954708
ISBN 13 : 9781441954701
Neuf
Taschenbuch
Vendeur : buchversandmimpf2000, Emtmannsberg, BAYE, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Taschenbuch. Etat : Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book examines the issue of design of fully integrated frequency synthesizers suitable for system-on-a-chip (SOC) processors. This book takes a more global design perspective in jointly examining the design space at the circuit level as well as at the architectural level. The coverage of the book is comprehensive and includes summary chapters on circuit theory as well as feedback control theory relevant to the operation of phase locked loops (PLLs). On the circuit level, the discussion includes low-voltage analog design in deep submicron digital CMOS processes, effects of supply noise, substrate noise, as well device noise. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discre- time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. The material then develops into detailed circuit and architectural analysis of specific clock generation blocks. This includes circuits and architectures of PLLs with high power supply noise immunity and digital PLL architectures where the loop filter is digitized. Methods of generating low-spurious sampling clocks for discrete-time analog blocks are then examined. This includes sigma-delta fractional-N PLLs, Direct Digital Synthesis (DDS) techniques and non-conventional uses of PLLs. Design for test (DFT) issues as they arise in PLLs are then discussed. This includes methods of accurately measuring jitter and built-in-self-test (BIST) techniques for PLLs.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 264 pp. Englisch. N° de réf. du vendeur 9781441954701
Quantité disponible : 1 disponible(s)
Image fournie par le vendeur
Clock Generators for Soc Processors : Circuits and Architectures
Vendeur : GreatBookPricesUK, Woodford Green, Royaume-Uni
Évaluation du vendeur 5 sur 5 étoiles
Etat : New. N° de réf. du vendeur 11878088-n
Quantité disponible : Plus de 20 disponibles
Image fournie par le vendeur
Clock Generators for Soc Processors : Circuits and Architectures
Edité par
Springer, 2010
ISBN 10 : 1441954708
ISBN 13 : 9781441954701
Ancien ou d'occasion
Couverture souple
Vendeur : GreatBookPrices, Columbia, MD, Etats-Unis
Évaluation du vendeur 5 sur 5 étoiles
Etat : As New. Unread book in perfect condition. N° de réf. du vendeur 11878088
Quantité disponible : Plus de 20 disponibles
Image fournie par le vendeur
Clock Generators for Soc Processors : Circuits and Architectures
Edité par
Springer, 2010
ISBN 10 : 1441954708
ISBN 13 : 9781441954701
Ancien ou d'occasion
Couverture souple
Vendeur : GreatBookPricesUK, Woodford Green, Royaume-Uni
Évaluation du vendeur 5 sur 5 étoiles
Etat : As New. Unread book in perfect condition. N° de réf. du vendeur 11878088
Quantité disponible : Plus de 20 disponibles
Image fournie par le vendeur
Clock Generators for Soc Processors : Circuits and Architectures
Vendeur : GreatBookPrices, Columbia, MD, Etats-Unis
Évaluation du vendeur 5 sur 5 étoiles
Etat : New. N° de réf. du vendeur 11878088-n
Quantité disponible : Plus de 20 disponibles
Image d'archives
Clock Generators for SOC Processors: Circuits and Architectures
Edité par
Springer-Verlag New York Inc., 2010
ISBN 10 : 1441954708
ISBN 13 : 9781441954701
Neuf
Paperback / softback
Vendeur : THE SAINT BOOKSTORE, Southport, Royaume-Uni
Évaluation du vendeur 5 sur 5 étoiles
Paperback / softback. Etat : New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days 431. N° de réf. du vendeur C9781441954701
Quantité disponible : Plus de 20 disponibles
Image d'archives
Clock Generators for SOC Processors: Circuits and Architectures
Vendeur : Lucky's Textbooks, Dallas, TX, Etats-Unis
Évaluation du vendeur 5 sur 5 étoiles
Etat : New. N° de réf. du vendeur ABLIING23Mar2411530296817
Quantité disponible : Plus de 20 disponibles