Switch-Level Timing Simulation of MOS VLSI Circuits - Couverture souple

Rao, Vasant B. B.; Overhauser, David V.; Trick, Timothy N.; Hajj, Ibrahim N.

 
9781461289630: Switch-Level Timing Simulation of MOS VLSI Circuits
Couverture souple
ISBN 10 : 1461289637 ISBN 13 : 9781461289630
Editeur : Springer, 2011

Synopsis

Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com- puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation.

Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.

Éditeur
Springer
Date d'édition
2011
Langue
anglais
ISBN 10 
1461289637
ISBN 13 
9781461289630
Reliure
Broché
Nombre de pages
224
Coordonnées du fabricant
non disponible
Personne responsable
CMN Printpool Inh. Mathis Neumann
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Autres éditions populaires du même titre

9780898383027: Switch-Level Timing Simulation of Mos VLSI Circuits

Edition présentée

ISBN 10 :  0898383021 ISBN 13 :  9780898383027
Editeur : Kluwer Academic Publishers, 1988
Couverture rigide