Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects. N� de r�f. du vendeur 4192269

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Logic Minimization Algorithms for VLSI Synthesis

Robert K. Brayton

Edit� par Springer US Sep 2011, 2011

ISBN 10 : 1461297842 ISBN 13 : 9781461297840

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Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne

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Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects, the impor tance of logic minimization for the synthesis of area and performance effective circuits clearly emerged. In 1980, Richard Newton stirred our interest by pointing out new heuristic algorithms for two-level logic minimization and the potential for improving upon existing approaches. In the summer of 1981, the authors organized and participated in a seminar on logic manipulation at IBM Research. One of the goals of the seminar was to study the literature on logic minimization and to look at heuristic algorithms from a fundamental and comparative point of view. The fruits of this investigation were surprisingly abundant: it was apparent from an initial implementation of recursive logic minimiza tion (ESPRESSO-I) that, if we merged our new results into a two-level minimization program, an important step forward in automatic logic synthesis could result. ESPRESSO-II was born and an APL implemen tation was created in the summer of 1982. The results of preliminary tests on a fairly large set of industrial examples were good enough to justify the publication of our algorithms. It is hoped that the strength and speed of our minimizer warrant its Italian name, which denotes both express delivery and a specially-brewed black coffee. 208 pp. Englisch. N� de r�f. du vendeur 9781461297840

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Logic Minimization Algorithms for VLSI Synthesis

Robert K. Brayton

Edit� par Springer New York, Springer US, 2011

ISBN 10 : 1461297842 ISBN 13 : 9781461297840

Neuf Taschenbuch

Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne

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Taschenbuch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects, the impor tance of logic minimization for the synthesis of area and performance effective circuits clearly emerged. In 1980, Richard Newton stirred our interest by pointing out new heuristic algorithms for two-level logic minimization and the potential for improving upon existing approaches. In the summer of 1981, the authors organized and participated in a seminar on logic manipulation at IBM Research. One of the goals of the seminar was to study the literature on logic minimization and to look at heuristic algorithms from a fundamental and comparative point of view. The fruits of this investigation were surprisingly abundant: it was apparent from an initial implementation of recursive logic minimiza tion (ESPRESSO-I) that, if we merged our new results into a two-level minimization program, an important step forward in automatic logic synthesis could result. ESPRESSO-II was born and an APL implemen tation was created in the summer of 1982. The results of preliminary tests on a fairly large set of industrial examples were good enough to justify the publication of our algorithms. It is hoped that the strength and speed of our minimizer warrant its Italian name, which denotes both express delivery and a specially-brewed black coffee. N� de r�f. du vendeur 9781461297840

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Logic Minimization Algorithms for VLSI Synthesis

Gary D. Hachtel Robert K. Brayton C. McMullen

Edit� par Springer, 2011

ISBN 10 : 1461297842 ISBN 13 : 9781461297840

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Etat : New. pp. 208. N� de r�f. du vendeur 2698198523

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Logic Minimization Algorithms for VLSI Synthesis

Hachtel Gary D. Brayton Robert K. McMullen C.

Edit� par Springer, 2011

ISBN 10 : 1461297842 ISBN 13 : 9781461297840

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Vendeur : Majestic Books, Hounslow, Royaume-Uni

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Etat : New. Print on Demand pp. 208 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam. N� de r�f. du vendeur 95280164

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