This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
Introduction.- Interconnect Design Techniques.- On-Chip Wire Modeling.- Design of Delay-Insensitive Current Sensing Interconnects.- Enhancing Completion Detection Performance.- Energy Efficient Semi-Serial Interconnect.- Comparison of the Designed Interconnects.- Circuit Techniques for PVT Variation Tolerance.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
Vendeur : Brook Bookstore On Demand, Napoli, NA, Italie
Etat : new. Questo è un articolo print on demand. N° de réf. du vendeur 34e6bc1fc67b705cfa1a8de58e7ea1db
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Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
Buch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems. 184 pp. Englisch. N° de réf. du vendeur 9781461401308
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Vendeur : moluna, Greven, Allemagne
Gebunden. Etat : New. Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect Describes design techniques to mitigate problems caused by variation Includes techniques for design and implementation o. N° de réf. du vendeur 4196731
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Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
Buch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems. N° de réf. du vendeur 9781461401308
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Vendeur : buchversandmimpf2000, Emtmannsberg, BAYE, Allemagne
Buch. Etat : Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 184 pp. Englisch. N° de réf. du vendeur 9781461401308
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Vendeur : Revaluation Books, Exeter, Royaume-Uni
Hardcover. Etat : Brand New. 170 pages. 9.25x6.25x0.50 inches. In Stock. N° de réf. du vendeur x-1461401305
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