Low Power Interconnect Design - Couverture rigide

Saini, Sandeep

Couverture rigide

ISBN 10 : 1461413222 ISBN 13 : 9781461413226

Editeur : Springer-Verlag New York Inc., 2015

Synopsis

This book provides practical solutions for delay and power reduction for on-chip interconnects and buses. It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the total system. Coverage focuses on use of the Schmitt Trigger as an alternative approach to buffer insertion for delay and power reduction in VLSI interconnects. In the last section of the book, various bus coding techniques are discussed to minimize delay and power in address and data buses.

A propos du livre

Présentation de l'éditeur

As well as offering practical solutions for delay and power reduction for on-chip interconnects and buses, this book provides in-depth descriptions of the problem of signal delay and extra power consumption and possible solutions for delays and glitches.

Détails de l'édition

• Éditeur: Springer-Verlag New York Inc.
• Date d'édition: 2015
• Langue: anglais
• ISBN 10: 1461413222
• ISBN 13: 9781461413226
• Reliure: Relié
• Nombre de pages: 152
• Coordonnées du fabricant: non disponible
• Personne responsable: CMN Printpool Inh. Mathis Neumann; https://www.also.com/ec/cms5/en_6000/6000/index.jsp; ; Friedrich-Karl-Str. 9; Hamburg; Allemagne