VLSI Test Principles and Architectures: Design for Testability - Couverture souple

9781493300860: VLSI Test Principles and Architectures: Design for Testability

Couverture souple

ISBN 10 : 1493300865 ISBN 13 : 9781493300860

Editeur : Morgan Kaufmann, 2014

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Revue de presse

In the era of large systems embedded in a single system-on-chip (SOC) and fabricated continuously shrinking technologies, it is important to ensure correct behavior of the whole system. Electronic design and test engineers of today have to deal with these complex and heterogeneous systems (digital, mixed-signal, memory), but few have the possibility to study the whole field in a detailed and deep way. This book provides an extremely broad knowledge of the discipline, covering the fundamentals in detail, as well as the most recent and advanced concepts.

Michel Renovell, Laboratoire d'Informatique, de Robotique et de Micro�lectronique de Montpellier (LIRMM), Montpellier, France

This book combines in a unique way insight into industry practices commonly found in commercial DFT tools but not discussed in textbooks, and a sound treatment of the future fundamentals. The comprehensive review of future test technology trends, including self-repair, soft error protection, MEMS testing, and RF testing, leads students and researchers to advanced DFT research.

Hans-Joachim Wunderlich, University of Stuttgart, Germany
Recent advances in semiconductor manufacturing have made design for testability (DFT) an essential part of nanometer designs. I am pleased to find a DFT textbook of this comprehensiveness that can serve both academic and professional needs.

Andre Ivanov, University of British Columbia, Canada

This is the most recent book covering all aspects of digital systems testing. It is a "must read” for anyone focused on learning modern test issues, test research, and test practices.

Kewal K. Saluja, University of Wisconsin-Madison
By covering the basic DFT theory and methodology on digital, memory, as well as analog and mixed-signal (AMS) testing, this book stands out as one best reference book that equips practitioners with testable SOC design skills.

Yihe Sun, Tsinghua University, Beijing, China

Pr�sentation de l'�diteur

This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.

� Most up-to-date coverage of design for testability.
� Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books.
� Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.
� Lecture slides and exercise solutions for all chapters are now available.
� Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website.

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