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Synopsis
Real Chip Design and Verification Using Verilog and VHDL addresses the practical and real aspects of logic design, processes, and verification. It incorporates a collection of FPGA and ASIC design practices, and uses Verilog and VHDL as a tool for expression of the desired architectures. This book is not intended to teach either HDL, as there are several books specifically geared toward teaching the languages. However, it provides various architectural design primitives, applications, and verification techniques, along with design methodologies and common practices.
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Présentation de l'éditeur
Real Chip Design and Verification Using Verilog and VHDL addresses the practical and real aspects of logic design, processes, and verification. It incorporates a collection of FPGA and ASIC design practices, and uses Verilog and VHDL as a tool for expression of the desired architectures. This book is not intended to teach either HDL, as there are several books specifically geared toward teaching the languages. However, it provides various architectural design primitives, applications, and verification techniques, along with design methodologies and common practices.
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Real Chip Design and Verification Using Verilog and VHDL
Edité par
Createspace Independent Publishing Platform, 2002
ISBN 10 : 1539769712
ISBN 13 : 9781539769712
Neuf
Paperback / softback
Vendeur : THE SAINT BOOKSTORE, Southport, Royaume-Uni
Évaluation du vendeur 5 sur 5 étoiles
Paperback / softback. Etat : New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days 980. N° de réf. du vendeur C9781539769712
Quantité disponible : Plus de 20 disponibles
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Real Chip Design and Verification Using Verilog and VHDL (Paperback)
Edité par
Createspace Independent Publishing Platform, 2002
ISBN 10 : 1539769712
ISBN 13 : 9781539769712
Neuf
Paperback
Vendeur : CitiRetail, Stevenage, Royaume-Uni
Évaluation du vendeur 5 sur 5 étoiles
Paperback. Etat : new. Paperback. Real Chip Design and Verification Using Verilog and VHDL addresses the practical and real aspects of logic design, processes, and verification. It incorporates a collection of FPGA and ASIC design practices, and uses Verilog and VHDL as a tool for expression of the desired architectures. This book is not intended to teach either HDL, as there are several books specifically geared toward teaching the languages. However, it provides various architectural design primitives, applications, and verification techniques, along with design methodologies and common practices. Shipping may be from our UK warehouse or from our Australian or US warehouses, depending on stock availability. N° de réf. du vendeur 9781539769712
Quantité disponible : 1 disponible(s)