As conventional memory technologies such as DRAM and Flash run into scaling challenges, architects and system designers are forced to look at alternative technologies for building future computer systems. This synthesis lecture begins by listing the requirements for a next generation memory technology and briefly surveys the landscape of novel non-volatile memories. Among these, Phase Change Memory (PCM) is emerging as a leading contender, and the authors discuss the material, device, and circuit advances underlying this exciting technology. The lecture then describes architectural solutions to enable PCM for main memories. Finally, the authors explore the impact of such byte-addressable non-volatile memories on future storage and system designs. Table of Contents: Next Generation Memory Technologies / Architecting PCM for Main Memories / Tolerating Slow Writes in PCM / Wear Leveling for Durability / Wear Leveling Under Adversarial Settings / Error Resilience in Phase Change Memories /Storage and System Design With Emerging Non-Volatile Memories
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
Dr. Moinuddin Qureshi is an Associate Professor at Georgia Institute of Technology. His research interest includes computer architecture, memory system design, and leveraging emerging technology for scalable and efficient systems. He was a Research Staff Member at IBM T.J. Watson Research Center from 2007 to 2011, where he contributed to caching algorithms of Power 7 processor and conducted research studies on emerging non-volatile memory technologies. He received his Ph.D. (2007) and M.S. (2003) from the University of Texas at Austin, and BE (2000) from Mumbai University. He has published more than a dozen papers in flagship architecture conferences and holds five US patents.Dr. Sudhanva Gurumurthi is an Associate Professor in the Computer Science Department at the University of Virginia. He received a BE degree from the College of Engineering Guindy, Chennai, India in 2000 and his Ph.D. from Penn State in 2005, both in the field of Computer Science and Engineering.Sudhanva's research interests include memory and storage systems, processor fault tolerance, and data center architecture. He has served on the program and organizing committees of several top computer architecture and systems conferences including ISCA, ASPLOS, HPCA, FAST, and SIGMETRICS. He has been an Associate Editor-in-Chief for IEEE Computer Architecture Letters (CAL) and currently serves as an Associate Editor. Sudhanva has held research positions at IBM Research and Intel and has served as a faculty consultant for Intel. Sudhanva is a recipient of the NSF CAREER Award and has received several research awards from NSF, Intel, Google, and HP. He is a Senior Member of the IEEE and the ACM.Dr. Bipin Rajendran is a Master Inventor and Research Staff Member at IBM T.J. Watson Research Center, engaged in exploratory research on non-volatile memories and neuromorphic computation. He has contributed to works that led to the most advanced multi-level demonstration in PCM (Nirschl et al, IEDM'07), universal metrics for reliability characterization of PCM (Rajendran et al, VLSI Technology Symposium '08), analytical model for PCM operation (Rajendran et al, IEDM '08) and PCM data retention models (Y.H Shih et al, IEDM '08). He has published more than 30 papers in peer reviewed journals and conferences and holds 20 US patents. He has served as a member of the Emerging Research Devices Working Group of the International Technology Roadmap for Semiconductors (ITRS) in 2010. He received a B.Tech degree (2000) from Indian Institute of Technology, Kharagpur and M.S (2003) and Ph.D (2006) in Electrical Engineering from Stanford University.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
EUR 2,25 expédition vers Etats-Unis
Destinations, frais et délaisEUR 2,25 expédition vers Etats-Unis
Destinations, frais et délaisVendeur : GreatBookPrices, Columbia, MD, Etats-Unis
Etat : New. N° de réf. du vendeur 44569594-n
Quantité disponible : Plus de 20 disponibles
Vendeur : BargainBookStores, Grand Rapids, MI, Etats-Unis
Paperback or Softback. Etat : New. Phase Change Memory: From Devices to Systems 0.54. Book. N° de réf. du vendeur BBS-9783031006074
Quantité disponible : 5 disponible(s)
Vendeur : GreatBookPrices, Columbia, MD, Etats-Unis
Etat : As New. Unread book in perfect condition. N° de réf. du vendeur 44569594
Quantité disponible : Plus de 20 disponibles
Vendeur : Books Puddle, New York, NY, Etats-Unis
Etat : New. 1st edition NO-PA16APR2015-KAP. N° de réf. du vendeur 26394683747
Quantité disponible : 4 disponible(s)
Vendeur : Ria Christie Collections, Uxbridge, Royaume-Uni
Etat : New. In. N° de réf. du vendeur ria9783031006074_new
Quantité disponible : Plus de 20 disponibles
Vendeur : Chiron Media, Wallingford, Royaume-Uni
PF. Etat : New. N° de réf. du vendeur 6666-IUK-9783031006074
Quantité disponible : 10 disponible(s)
Vendeur : Majestic Books, Hounslow, Royaume-Uni
Etat : New. Print on Demand. N° de réf. du vendeur 401726140
Quantité disponible : 4 disponible(s)
Vendeur : GreatBookPricesUK, Woodford Green, Royaume-Uni
Etat : New. N° de réf. du vendeur 44569594-n
Quantité disponible : Plus de 20 disponibles
Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -As conventional memory technologies such as DRAM and Flash run into scaling challenges, architects and system designers are forced to look at alternative technologies for building future computer systems. This synthesis lecture begins by listing the requirements for a next generation memory technology and briefly surveys the landscape of novel non-volatile memories. Among these, Phase Change Memory (PCM) is emerging as a leading contender, and the authors discuss the material, device, and circuit advances underlying this exciting technology. The lecture then describes architectural solutions to enable PCM for main memories. Finally, the authors explore the impact of such byte-addressable non-volatile memories on future storage and system designs. Table of Contents: Next Generation Memory Technologies / Architecting PCM for Main Memories / Tolerating Slow Writes in PCM / Wear Leveling for Durability / Wear Leveling Under Adversarial Settings / Error Resilience in Phase Change Memories / Storage and System Design With Emerging Non-Volatile Memories 136 pp. Englisch. N° de réf. du vendeur 9783031006074
Quantité disponible : 2 disponible(s)
Vendeur : Biblios, Frankfurt am main, HESSE, Allemagne
Etat : New. PRINT ON DEMAND. N° de réf. du vendeur 18394683753
Quantité disponible : 4 disponible(s)