This book discusses the trade-offs involved in designing direct RF digitization receivers for the radio frequency and digital signal processing domains. A system-level framework is developed, quantifying the relevant impairments of the signal processing chain, through a comprehensive system-level analysis. Special focus is given to noise analysis (thermal noise, quantization noise, saturation noise, signal-dependent noise), broadband non-linear distortion analysis, including the impact of the sampling strategy (low-pass, band-pass), analysis of time-interleaved ADC channel mismatches, sampling clock purity and digital channel selection. The system-level framework described is applied to the design of a cable multi-channel RF direct digitization receiver. An optimum RF signal conditioning, and some algorithms (automatic gain control loop, RF front-end amplitude equalization control loop) are used to relax the requirements of a 2.7GHz 11-bit ADC.
A two-chip implementation is presented, using BiCMOS and 65nm CMOS processes, together with the block and system-level measurement results. Readers will benefit from the techniques presented, which are highly competitive, both in terms of cost and RF performance, while drastically reducing power consumption.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
This book describes the system-level design of an application-optimized signal conditioner together with its control algorithm and a mixed-signal AGC loop combining RMS and peak detection.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
Vendeur : Brook Bookstore On Demand, Napoli, NA, Italie
Etat : new. Questo è un articolo print on demand. N° de réf. du vendeur 808190cdbe1d0f46a0ae5aa38d0a1ca2
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Vendeur : Ria Christie Collections, Uxbridge, Royaume-Uni
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Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
Buch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book discusses the trade-offs involved in designing direct RF digitization receivers for the radio frequency and digital signal processing domains. A system-level framework is developed, quantifying the relevant impairments of the signal processing chain, through a comprehensive system-level analysis. Special focus is given to noise analysis (thermal noise, quantization noise, saturation noise, signal-dependent noise), broadband non-linear distortion analysis, including the impact of the sampling strategy (low-pass, band-pass), analysis of time-interleaved ADC channel mismatches, sampling clock purity and digital channel selection. The system-level framework described is applied to the design of a cable multi-channel RF direct digitization receiver. An optimum RF signal conditioning, and some algorithms (automatic gain control loop, RF front-end amplitude equalization control loop) are used to relax the requirements of a 2.7GHz 11-bit ADC. A two-chip implementation is presented, using BiCMOS and 65nm CMOS processes, together with the block and system-level measurement results. Readers will benefit from the techniques presented, which are highly competitive, both in terms of cost and RF performance, while drastically reducing power consumption. 180 pp. Englisch. N° de réf. du vendeur 9783319011493
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Vendeur : moluna, Greven, Allemagne
Gebunden. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Provides system-level analysis of direct RF sampling & digitization receivers, from the antenna to the digital channel selectionIncludes analysis of broadband non-linearity, applicable for low-pass and band-pass sampling strategiesDescr. N° de réf. du vendeur 4496065
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Vendeur : Revaluation Books, Exeter, Royaume-Uni
Hardcover. Etat : Brand New. 2014 edition. 176 pages. 9.50x6.50x0.75 inches. In Stock. N° de réf. du vendeur x-3319011499
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Vendeur : buchversandmimpf2000, Emtmannsberg, BAYE, Allemagne
Buch. Etat : Neu. Neuware -This book discusses the trade-offs involved in designing direct RF digitization receivers for the radio frequency and digital signal processing domains. A system-level framework is developed, quantifying the relevant impairments of the signal processing chain, through a comprehensive system-level analysis. Special focus is given to noise analysis (thermal noise, quantization noise, saturation noise, signal-dependent noise), broadband non-linear distortion analysis, including the impact of the sampling strategy (low-pass, band-pass), analysis of time-interleaved ADC channel mismatches, sampling clock purity and digital channel selection. The system-level framework described is applied to the design of a cable multi-channel RF direct digitization receiver. An optimum RF signal conditioning, and some algorithms (automatic gain control loop, RF front-end amplitude equalization control loop) are used to relax the requirements of a 2.7GHz 11-bit ADC.A two-chip implementation is presented, using BiCMOS and 65nm CMOS processes, together with the block and system-level measurement results. Readers will benefit from the techniques presented, which are highly competitive, both in terms of cost and RF performance, while drastically reducing power consumption.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 180 pp. Englisch. N° de réf. du vendeur 9783319011493
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Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
Buch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - This book discusses the trade-offs involved in designing direct RF digitization receivers for the radio frequency and digital signal processing domains. A system-level framework is developed, quantifying the relevant impairments of the signal processing chain, through a comprehensive system-level analysis. Special focus is given to noise analysis (thermal noise, quantization noise, saturation noise, signal-dependent noise), broadband non-linear distortion analysis, including the impact of the sampling strategy (low-pass, band-pass), analysis of time-interleaved ADC channel mismatches, sampling clock purity and digital channel selection. The system-level framework described is applied to the design of a cable multi-channel RF direct digitization receiver. An optimum RF signal conditioning, and some algorithms (automatic gain control loop, RF front-end amplitude equalization control loop) are used to relax the requirements of a 2.7GHz 11-bit ADC. A two-chip implementation is presented, using BiCMOS and 65nm CMOS processes, together with the block and system-level measurement results. Readers will benefit from the techniques presented, which are highly competitive, both in terms of cost and RF performance, while drastically reducing power consumption. N° de réf. du vendeur 9783319011493
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Vendeur : Mispah books, Redhill, SURRE, Royaume-Uni
Hardcover. Etat : Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book. N° de réf. du vendeur ERICA79733190114996
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