Articles liés à Noise-shaping All-digital Phase-locked Loops: Modeling,...

Noise-shaping All-digital Phase-locked Loops: Modeling, Simulation, Analysis and Design - Couverture rigide

Livre 71 sur 124: Analog Circuits and Signal Processing

Brandonisio, Francesco; Kennedy, Michael Peter

 
9783319036588: Noise-shaping All-digital Phase-locked Loops: Modeling, Simulation, Analysis and Design
Couverture rigide
ISBN 10 : 3319036580 ISBN 13 : 9783319036588
Editeur : Springer International Publishing AG, 2014

Synopsis

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.

Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.

À propos de la quatrième de couverture

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.

Discusses in detail a wide range of all-digital phase-locked loops architectures;
Presents a unified framework in which to model time-to-digital converters for ADPLLs;
Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs;
Describes an efficient approach to model ADPLLS;
Includes Matlab code to reproduce the examples in the book.

Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.

Éditeur
Springer International Publishing AG
Date d'édition
2014
Langue
anglais
ISBN 10 
3319036580
ISBN 13 
9783319036588
Reliure
Relié
Nombre de pages
212
Coordonnées du fabricant
non disponible
Personne responsable
non disponible