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High-performance Computing on the Intel Xeon Phi: How to Fully Exploit Mic Architectures - Couverture rigide
Synopsis
The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel(R) Xeon Phi(TM) series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors' first-hand optimization experience.
The material is organized in three sections. The first section, "Basics of MIC", introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on "Performance Optimization" explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, "Project development" presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.
This book appeals to two main audiences: First, software developers for HPC applications - it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing - it will guide them on how to push the limits of system performance for HPC applications.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
À propos de l?auteur
Endong Wang is the Director of the State Key Laboratory of High-Efficiency Server and Storage Technology at the Inspur-Intel China Parallel Computing Joint Lab and Senior Vice President of the Inspur Group Co., Ltd. Qing Zhang is the lead engineer of the Inspur-Intel China Parallel Computing Joint Lab and with his team he was among the first to work with the development environment of the Intel(R) Xeon processor and Intel(R) Xeon Phi(TM) coprocessor. Together they have several years of experience in HPC programming.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
- ÉditeurSpringer International Publishing AG
- Date d'édition2014
- ISBN 10 3319064851
- ISBN 13 9783319064857
- ReliureRelié
- Langueanglais
- Nombre de pages338
- Coordonnées du fabricantnon disponible
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High-Performance Computing on the Intel® Xeon Phi¿ : How to Fully Exploit MIC Architectures
Edité par
Springer International Publishing, 2014
ISBN 10 : 3319064851
ISBN 13 : 9783319064857
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Etat : Hervorragend. Zustand: Hervorragend | Seiten: 364 | Sprache: Englisch | Produktart: Bücher. N° de réf. du vendeur 24836844/11
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High-Performance Computing on the Intel® Xeon Phi?: How to Fully Exploit MIC Architectures [Hardcover] Wang, Endong; Zhang, Qing; Shen, Bo; Zhang, Guangyong; Lu, Xiaowei; Wu, Qing and Wang, Yajuan
Edité par
Springer, 2014
ISBN 10 : 3319064851
ISBN 13 : 9783319064857
Ancien ou d'occasion
Couverture rigide
Vendeur : SpringBooks, Berlin, Allemagne
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Hardcover. Etat : As New. Unread, like new. Immediately dispatched from Germany. N° de réf. du vendeur CED-2406C-LAMPE-03-1000
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High-Performance Computing on the Intel® Xeon Phi(TM)
Edité par
Springer International Publishing, 2014
ISBN 10 : 3319064851
ISBN 13 : 9783319064857
Neuf
Couverture rigide
Vendeur : moluna, Greven, Allemagne
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Gebunden. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Explains HPC from general optimization and parallel programming concepts to the details of MIC programmingIllustrates all concepts with both a standard example and extracts of real-world applicationsWritten by a team closely involved in the. N° de réf. du vendeur 4497590
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High-Performance Computing on the Intel® Xeon Phi¿ : How to Fully Exploit MIC Architectures
Edité par
Springer International Publishing, 2014
ISBN 10 : 3319064851
ISBN 13 : 9783319064857
Neuf
Couverture rigide
Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Buch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel® Xeon Phi(TM) series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors' first-hand optimization experience.The material is organized in three sections. The first section, 'Basics of MIC', introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on 'Performance Optimization' explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, 'Project development' presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.This book appeals to two main audiences: First, software developers for HPC applications - it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing - it will guide them on how to push the limits of system performance for HPC applications. N° de réf. du vendeur 9783319064857
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High-Performance Computing on the Intel® Xeon Phi(TM)
ISBN 10 : 3319064851
ISBN 13 : 9783319064857
Neuf
Couverture rigide
Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
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Buch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel® Xeon Phi(TM) series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors' first-hand optimization experience.The material is organized in three sections. The first section, 'Basics of MIC', introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on 'Performance Optimization' explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, 'Project development' presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.This book appeals to two main audiences: First, software developers for HPC applications - it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing - it will guide them on how to push the limits of system performance for HPC applications. 364 pp. Englisch. N° de réf. du vendeur 9783319064857
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High-Performance Computing on the Intel® Xeon Phi?: How to Fully Exploit MIC Architectures
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High-Performance Computing on the Intel® Xeon Phi(TM)
ISBN 10 : 3319064851
ISBN 13 : 9783319064857
Neuf
Couverture rigide
Vendeur : buchversandmimpf2000, Emtmannsberg, BAYE, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Buch. Etat : Neu. Neuware -The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel® Xeon Phi¿ series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors¿ first-hand optimization experience.The material is organized in three sections. The first section, ¿Basics of MIC¿, introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on ¿Performance Optimization¿ explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, ¿Project development¿ presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.This book appeals to two main audiences: First, software developers for HPC applications ¿ it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing ¿ it will guide them on how to push the limits of system performance for HPC applications.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 364 pp. Englisch. N° de réf. du vendeur 9783319064857
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