The methodology described in this book is the result of many years of research experience in the field of synthesizable VHDL design targeting FPGA based platforms. VHDL was first conceived as a documentation language for ASIC designs. Afterwards, the language was used for the behavioral simulation of ASICs, and also as a design input for synthesis tools. VHDL is a rich language, but just a small subset of it can be used to write synthesizable code, from which a physical circuit can be obtained. Usually VHDL books describe both, synthesis and simulation aspects of the language, but in this book the reader is conducted just through the features acceptable by synthesis tools. The book introduces the subjects in a gradual and concise way, providing just enough information for the reader to develop their synthesizable digital systems in VHDL. The examples in the book were planned targeting an FPGA platform widely used around the world.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
Dr. Eduardo Bezerra is a Researcher and Lecturer of Computer Engineering at Universidade Federal de Santa Catarina (UFSC), where he is with the Department of Electrical Engineering since 2010. He received his Ph.D. in Computer Engineering from the University of Sussex (Space Science Centre), England, UK, in 2002. His research interests are in the areas of embedded systems, computer architecture, reconfigurable systems (FPGAs), space applications, software & hardware testing, fault tolerance and microprocessor applications.
Djones Lettnin has Master´s in Electric Engineering at Catholic University of Rio Grande do Sul (2004), Brazil, and Sc.D. in Computer Engineering at the Eberhard Karls University of Tübingen (2009), Germany. In August 2011 he became Professor at Federal University of Santa Catarina, Brazil. Since August 2012 he is first coordinator of the Cadence Academic Network in Latin America. His main interests are in design and functional verification of hardware and embedded software with main focus on: modeling of embedded systems, digital design, verification based on assertions, semiformal and formal verification using model checking.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
Vendeur : Brook Bookstore On Demand, Napoli, NA, Italie
Etat : new. Questo è un articolo print on demand. N° de réf. du vendeur 8962f75c078e83b85fbb42c803136198
Quantité disponible : Plus de 20 disponibles
Vendeur : Ria Christie Collections, Uxbridge, Royaume-Uni
Etat : New. In. N° de réf. du vendeur ria9783319377339_new
Quantité disponible : Plus de 20 disponibles
Vendeur : Chiron Media, Wallingford, Royaume-Uni
Paperback. Etat : New. N° de réf. du vendeur 6666-IUK-9783319377339
Quantité disponible : 10 disponible(s)
Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The methodology described in this book is the result of many years of research experience in the field of synthesizable VHDL design targeting FPGA based platforms. VHDL was first conceived as a documentation language for ASIC designs. Afterwards, the language was used for the behavioral simulation of ASICs, and also as a design input for synthesis tools. VHDL is a rich language, but just a small subset of it can be used to write synthesizable code, from which a physical circuit can be obtained. Usually VHDL books describe both, synthesis and simulation aspects of the language, but in this book the reader is conducted just through the features acceptable by synthesis tools. The book introduces the subjects in a gradual and concise way, providing just enough information for the reader to develop their synthesizable digital systems in VHDL. The examples in the book were planned targeting an FPGA platform widely used around the world. 168 pp. Englisch. N° de réf. du vendeur 9783319377339
Quantité disponible : 2 disponible(s)
Vendeur : moluna, Greven, Allemagne
Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Introduces the subjects in a very concise format, providing just enough information for the reader to develop their first digital systems in VHDLBook content based on 20 years of experience teaching the subject in undergraduate and graduate course. N° de réf. du vendeur 385704298
Quantité disponible : Plus de 20 disponibles
Vendeur : preigu, Osnabrück, Allemagne
Taschenbuch. Etat : Neu. Synthesizable VHDL Design for FPGAs | Eduardo Augusto Bezerra (u. a.) | Taschenbuch | vii | Englisch | 2016 | Springer | EAN 9783319377339 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. N° de réf. du vendeur 103409279
Quantité disponible : 5 disponible(s)
Vendeur : buchversandmimpf2000, Emtmannsberg, BAYE, Allemagne
Taschenbuch. Etat : Neu. This item is printed on demand - Print on Demand Titel. Neuware -The methodology described in this book is the result of many years of research experience in the field of synthesizable VHDL design targeting FPGA based platforms. VHDL was first conceived as a documentation language for ASIC designs. Afterwards, the language was used for the behavioral simulation of ASICs, and also as a design input for synthesis tools. VHDL is a rich language, but just a small subset of it can be used to write synthesizable code, from which a physical circuit can be obtained. Usually VHDL books describe both, synthesis and simulation aspects of the language, but in this book the reader is conducted just through the features acceptable by synthesis tools. The book introduces the subjects in a gradual and concise way, providing just enough information for the reader to develop their synthesizable digital systems in VHDL. The examples in the book were planned targeting an FPGA platform widely used around the world.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 168 pp. Englisch. N° de réf. du vendeur 9783319377339
Quantité disponible : 1 disponible(s)
Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
Taschenbuch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - The methodology described in this book is the result of many years of research experience in the field of synthesizable VHDL design targeting FPGA based platforms. VHDL was first conceived as a documentation language for ASIC designs. Afterwards, the language was used for the behavioral simulation of ASICs, and also as a design input for synthesis tools. VHDL is a rich language, but just a small subset of it can be used to write synthesizable code, from which a physical circuit can be obtained. Usually VHDL books describe both, synthesis and simulation aspects of the language, but in this book the reader is conducted just through the features acceptable by synthesis tools. The book introduces the subjects in a gradual and concise way, providing just enough information for the reader to develop their synthesizable digital systems in VHDL. The examples in the book were planned targeting an FPGA platform widely used around the world. N° de réf. du vendeur 9783319377339
Quantité disponible : 1 disponible(s)
Vendeur : Books Puddle, New York, NY, Etats-Unis
Etat : New. pp. 157. N° de réf. du vendeur 26375160579
Quantité disponible : 4 disponible(s)
Vendeur : Majestic Books, Hounslow, Royaume-Uni
Etat : New. Print on Demand pp. 157. N° de réf. du vendeur 371966172
Quantité disponible : 4 disponible(s)