This book addresses the need for energy-efficient amplifiers, providing gain enhancement strategies, suitable to run in parallel with lower supply voltages, by introducing a new family of single-stage cascode-free amplifiers, with proper design, optimization, fabrication and experimental evaluation. The authors describe several topologies, using the UMC 130 nm CMOS technology node with standard-VT devices, for proof-of-concept, achieving results far beyond what is achievable with a classic single-stage folded-cascode amplifier. Readers will learn about a new family of circuits with a broad range of applications, together with the familiarization with a state-of-the-art electronic design automation methodology used to explore the design space of the proposed circuit family.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
Ricardo F. S. Póvoa is a Post-Doctoral Researcher in the Integrated Circuits Group, within the Instituto de Telecomunicações, Lisboa, Portugal.
João C. da Palma Goes is a Professor at Faculdade de Ciências e Tecnologia, Universidade Nova de Lisboa, Lisboa, Portugal. Nuno C. G. Horta is a Professor at Instituto Superior Técnico, Universidade de Lisboa, and a Senior Researcher in the Integrated Circuits Group, within the Instituto de Telecomunicações, Lisboa, Portugal.Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
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Buch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book addresses the need for energy-efficient amplifiers, providing gain enhancement strategies, suitable to run in parallel with lower supply voltages, by introducing a new family of single-stage cascode-free amplifiers, with proper design, optimization, fabrication and experimental evaluation. The authors describe several topologies, using the UMC 130 nm CMOS technology node with standard-VT devices, for proof-of-concept, achieving results far beyond what is achievable with a classic single-stage folded-cascode amplifier. Readers will learn about a new family of circuits with a broad range of applications, together with the familiarization with a state-of-the-art electronic design automation methodology used to explore the design space of the proposed circuit family. 160 pp. Englisch. N° de réf. du vendeur 9783319952062
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Gebunden. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. - Introduces a new family of CMOS cascode-free amplifiers with high energy-efficiency and improved gain - Describes innovative circuit topologies: the Voltage-Combiners biased OTA (supplied by a 3.3 V source) the Voltage-Combiners bi. N° de réf. du vendeur 230746432
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Buch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - This book addresses the need for energy-efficient amplifiers, providing gain enhancement strategies, suitable to run in parallel with lower supply voltages, by introducing a new family of single-stage cascode-free amplifiers, with proper design, optimization, fabrication and experimental evaluation. The authors describe several topologies, using the UMC 130 nm CMOS technology node with standard-VT devices, for proof-of-concept, achieving results far beyond what is achievable with a classic single-stage folded-cascode amplifier. Readers will learn about a new family of circuits with a broad range of applications, together with the familiarization with a state-of-the-art electronic design automation methodology used to explore the design space of the proposed circuit family. N° de réf. du vendeur 9783319952062
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Buch. Etat : Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book addresses the need for energy-efficient amplifiers, providing gain enhancement strategies, suitable to run in parallel with lower supply voltages, by introducing a new family of single-stage cascode-free amplifiers, with proper design, optimization, fabrication and experimental evaluation. The authors describe several topologies, using the UMC 130 nm CMOS technology node with standard-VT devices, for proof-of-concept, achieving results far beyond what is achievable with a classic single-stage folded-cascode amplifier. Readers will learn about a new family of circuits with a broad range of applications, together with the familiarization with a state-of-the-art electronic design automation methodology used to explore the design space of the proposed circuit family.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 160 pp. Englisch. N° de réf. du vendeur 9783319952062
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