Realization of Memory Fault Tolerance using Error Correcting Codes - Couverture souple

S. Murti Sarma, N.; Lavanya, Poluboyina; Prasad Acharya, Gobinda

 
9783330044197: Realization of Memory Fault Tolerance using Error Correcting Codes

Synopsis

This work is aimed towards the implementation of a fault-tolerant memory system with the help of supporting circuits. This work demonstrates an improvement on the reliability of a semiconductor memory system using Error control codes (ECC)and Low Density Parity Check (LDPC) Codes as a part of protecting support logic. It is observed that the error correcting codes with higher hamming distances can detect more errors i.e. as higher the hamming distance higher the error control capability.

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