Synopsis
Approximate computation provide alternate solution to reduce energy consumption of high performance present day DSP application devices. Conventional multiplication and addition techniques consume a lot of energy. In this brief design of approximate arithmetic units for signal processing application is explored. First an approximate adder is proposed by changing the logic of basic full adder cell. The proposed adder cell has fewer transistor count compared to recent similar approach. Next, an approximate multiplier with low error is designed using lead one detection and selecting n/2 bits for an n bit input. The proposed n/2 bit approximate multiplier performs well in terms of error and power performance compared to recent similar approach. In continuation the approximate units are implemented in a Multiply-Accumulate(MAC) unit. The proposed approximate MAC unit provides significant improvement in power, area, and delay at the cost of little degrade in accuracy. Finally, the proposed MAC unit is implemented in filtering application to verify the functionality.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
Résultats de recherche pour CMOS Area Efficient Approximate Arithmetic Architectures
Image fournie par le vendeur
CMOS Area Efficient Approximate Arithmetic Architectures
Edité par
LAP LAMBERT Academic Publishing Jun 2017, 2017
ISBN 10 : 3330331798
ISBN 13 : 9783330331792
Neuf
Taschenbuch
Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Approximate computation provide alternate solution to reduce energy consumption of high performance present day DSP application devices. Conventional multiplication and addition techniques consume a lot of energy. In this brief design of approximate arithmetic units for signal processing application is explored. First an approximate adder is proposed by changing the logic of basic full adder cell. The proposed adder cell has fewer transistor count compared to recent similar approach. Next, an approximate multiplier with low error is designed using lead one detection and selecting n/2 bits for an n bit input. The proposed n/2 bit approximate multiplier performs well in terms of error and power performance compared to recent similar approach. In continuation the approximate units are implemented in a Multiply-Accumulate(MAC) unit. The proposed approximate MAC unit provides significant improvement in power, area, and delay at the cost of little degrade in accuracy. Finally, the proposed MAC unit is implemented in filtering application to verify the functionality. 60 pp. Englisch. N° de réf. du vendeur 9783330331792
Acheter neuf
EUR 35,90
Frais de port :
EUR 23
De Allemagne vers Etats-Unis
Quantité disponible : 2 disponible(s)
Image fournie par le vendeur
CMOS Area Efficient Approximate Arithmetic Architectures
Edité par
LAP LAMBERT Academic Publishing, 2017
ISBN 10 : 3330331798
ISBN 13 : 9783330331792
Neuf
Couverture souple
Vendeur : moluna, Greven, Allemagne
Évaluation du vendeur 4 sur 5 étoiles
Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Krishnasamy Natarajan VijeyakumarK.N.Vijeyakumar has completed his ME in Applied Electronics at GCT, Coimbatore. He has completed his research in CMOS Processor Design for Signal and Image Processing Applications. He has published re. N° de réf. du vendeur 154889620
Acheter neuf
EUR 31,27
Frais de port :
EUR 48,99
De Allemagne vers Etats-Unis
Quantité disponible : Plus de 20 disponibles
Image fournie par le vendeur
CMOS Area Efficient Approximate Arithmetic Architectures
Edité par
LAP LAMBERT Academic Publishing Jun 2017, 2017
ISBN 10 : 3330331798
ISBN 13 : 9783330331792
Neuf
Taschenbuch
Vendeur : buchversandmimpf2000, Emtmannsberg, BAYE, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Taschenbuch. Etat : Neu. Neuware -Approximate computation provide alternate solution to reduce energy consumption of high performance present day DSP application devices. Conventional multiplication and addition techniques consume a lot of energy. In this brief design of approximate arithmetic units for signal processing application is explored. First an approximate adder is proposed by changing the logic of basic full adder cell. The proposed adder cell has fewer transistor count compared to recent similar approach. Next, an approximate multiplier with low error is designed using lead one detection and selecting n/2 bits for an n bit input. The proposed n/2 bit approximate multiplier performs well in terms of error and power performance compared to recent similar approach. In continuation the approximate units are implemented in a Multiply-Accumulate(MAC) unit. The proposed approximate MAC unit provides significant improvement in power, area, and delay at the cost of little degrade in accuracy. Finally, the proposed MAC unit is implemented in filtering application to verify the functionality.Books on Demand GmbH, Überseering 33, 22297 Hamburg 60 pp. Englisch. N° de réf. du vendeur 9783330331792
Acheter neuf
EUR 35,90
Frais de port :
EUR 60
De Allemagne vers Etats-Unis
Quantité disponible : 2 disponible(s)
Image fournie par le vendeur
CMOS Area Efficient Approximate Arithmetic Architectures
Edité par
LAP LAMBERT Academic Publishing, 2017
ISBN 10 : 3330331798
ISBN 13 : 9783330331792
Neuf
Taschenbuch
Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Approximate computation provide alternate solution to reduce energy consumption of high performance present day DSP application devices. Conventional multiplication and addition techniques consume a lot of energy. In this brief design of approximate arithmetic units for signal processing application is explored. First an approximate adder is proposed by changing the logic of basic full adder cell. The proposed adder cell has fewer transistor count compared to recent similar approach. Next, an approximate multiplier with low error is designed using lead one detection and selecting n/2 bits for an n bit input. The proposed n/2 bit approximate multiplier performs well in terms of error and power performance compared to recent similar approach. In continuation the approximate units are implemented in a Multiply-Accumulate(MAC) unit. The proposed approximate MAC unit provides significant improvement in power, area, and delay at the cost of little degrade in accuracy. Finally, the proposed MAC unit is implemented in filtering application to verify the functionality. N° de réf. du vendeur 9783330331792
Acheter neuf
EUR 35,90
Frais de port :
EUR 60,54
De Allemagne vers Etats-Unis
Quantité disponible : 1 disponible(s)
Image fournie par le vendeur
CMOS Area Efficient Approximate Arithmetic Architectures
Edité par
LAP LAMBERT Academic Publishing, 2017
ISBN 10 : 3330331798
ISBN 13 : 9783330331792
Neuf
Taschenbuch
Vendeur : preigu, Osnabrück, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Taschenbuch. Etat : Neu. CMOS Area Efficient Approximate Arithmetic Architectures | Vijeyakumar Krishnasamy Natarajan (u. a.) | Taschenbuch | 60 S. | Englisch | 2017 | LAP LAMBERT Academic Publishing | EAN 9783330331792 | Verantwortliche Person für die EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod[dot]de | Anbieter: preigu. N° de réf. du vendeur 109438216
Acheter neuf
EUR 33,25
Frais de port :
EUR 70
De Allemagne vers Etats-Unis
Quantité disponible : 5 disponible(s)
Image d'archives
CMOS Area Efficient Approximate Arithmetic Architectures
Edité par
LAP LAMBERT Academic Publishing, 2017
ISBN 10 : 3330331798
ISBN 13 : 9783330331792
Neuf
paperback
Vendeur : Mispah books, Redhill, SURRE, Royaume-Uni
Évaluation du vendeur 4 sur 5 étoiles
paperback. Etat : New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book. N° de réf. du vendeur ERICA82933303317986
Acheter neuf
EUR 131,21
Frais de port :
EUR 28,44
De Royaume-Uni vers Etats-Unis
Quantité disponible : 1 disponible(s)