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Performance Enhancement of DES Algorithm Using Irrational Number - Couverture souple

Kaur, Jagandeep

 
9783330341340: Performance Enhancement of DES Algorithm Using Irrational Number

Synopsis

Security is a main concern in information and data systems of all types. Data Encryption Standard is one of cryptographic algorithm that provides security. Multiple DES provides additional cryptographic strength to DES by using more than a single key. Every time same plaintext is encrypted with the same key, same cipher text is obtained with standard and multiple DES. Time taken by Double and Triple DES is double, triple respectively to that of standard DES. This dissertation work is focused on enhancing the performance of standard DES in terms of security of generated cipher text by increasing the key space by using an irrational number PI generated by super PI software and provides different cipher text every time for the same plaintext using the same key without costing any more time to run.

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Présentation de l'éditeur

Security is a main concern in information and data systems of all types. Data Encryption Standard is one of cryptographic algorithm that provides security. Multiple DES provides additional cryptographic strength to DES by using more than a single key. Every time same plaintext is encrypted with the same key, same cipher text is obtained with standard and multiple DES. Time taken by Double and Triple DES is double, triple respectively to that of standard DES. This dissertation work is focused on enhancing the performance of standard DES in terms of security of generated cipher text by increasing the key space by using an irrational number PI generated by super PI software and provides different cipher text every time for the same plaintext using the same key without costing any more time to run.

Biographie de l'auteur

Jagandeep Kaur is currenlty working as an Assistant Professor in the ECE department, Amity University, Haryana. She received M.Tech. degree from National Institute of Technology, Kurukshetra, Haryana, India. She is pursuing Ph.D. in VLSI design from Amity University, Haryana. Her research interests are analog/mixed signal design.

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