VLSI Algorithms and Architectures: Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings - Couverture souple
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VLSI Algorithms and Architectures: Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings (Lecture Notes in Computer Science)
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Springer, 1986
ISBN 10 : 3540167668
ISBN 13 : 9783540167662
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VLSI Algorithms and Architectures: Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings (Lecture Notes in Computer Science, 227)
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VLSI Algorithms and Architectures: Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings (Lecture Notes in Computer Science, 227)
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VLSI Algorithms and Architectures: Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings (Lecture Notes in Computer Science, 227)
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VLSI Algorithms and Architectures : Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings
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VLSI Algorithms and Architectures
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Springer Berlin Heidelberg, Springer Berlin Heidelberg Jun 1986, 1986
ISBN 10 : 3540167668
ISBN 13 : 9783540167662
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Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Digital filtering in VLSI.- Two processor scheduling is in NC.- Breaking symmetry in synchronous networks.- Parallel ear decomposition search (EDS) and st-numbering in graphs.- A unifying framework for systolic designs.- Optimal tradeoffs for addition on systolic arrays.- On the connection between hexagonal and unidirectional rectangular systolic arrays.- Lower bounds for sorting on mesh-connected architectures.- Diogenes, circa 1986 o o o.- Nonsequential computation and laws of nature.- Linear algorithms for two CMOS layout problems.- Some new results on a restricted channel routing problem.- Efficient modular design of TSC checkers for m-out-of-2m codes.- Vlsi algorithms and pipelined architectures for solving structured linear system.- A high-performance single-chip vlsi signal processor architecture.- Exploiting hierarchy in VLSI design.- A polynomial algorithm for recognizing images of polyhedra.- Parallel tree techniques and code optimization.- AT2-optimal galois field multiplier for VLSI.- Linear and book embeddings of graphs.- Efficient parallel evaluation of straight-line code and arithmetic circuits.- A logarithmic boolean time algorithm for parallel polynomial division.- A polynomial algorithm for recognizing small cutwidth in hypergraphs.- A generalized topological sorting problem.- Combinational static CMOS networks.- Fast and efficient parallel linear programming and linear least squares computations.- On the time required to sum n semigroup elements on a parallel machine with simultaneous writes.- A comparative study of concurrency control methods in B-trees.- Generalized river routing ¿ Algorithms and performance bounds. 340 pp. Englisch. N° de réf. du vendeur 9783540167662
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VLSI Algorithms and Architectures
Edité par
Springer Berlin Heidelberg, 1986
ISBN 10 : 3540167668
ISBN 13 : 9783540167662
Neuf
Couverture souple
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Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Digital filtering in VLSI.- Two processor scheduling is in NC.- Breaking symmetry in synchronous networks.- Parallel ear decomposition search (EDS) and st-numbering in graphs.- A unifying framework for systolic designs.- Optimal tradeoffs for addition on sy. N° de réf. du vendeur 4883182
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VLSI Algorithms and Architectures
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Springer Berlin Heidelberg, Springer Berlin Heidelberg Jun 1986, 1986
ISBN 10 : 3540167668
ISBN 13 : 9783540167662
Neuf
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Taschenbuch. Etat : Neu. This item is printed on demand - Print on Demand Titel. Neuware -Digital filtering in VLSI.- Two processor scheduling is in NC.- Breaking symmetry in synchronous networks.- Parallel ear decomposition search (EDS) and st-numbering in graphs.- A unifying framework for systolic designs.- Optimal tradeoffs for addition on systolic arrays.- On the connection between hexagonal and unidirectional rectangular systolic arrays.- Lower bounds for sorting on mesh-connected architectures.- Diogenes, circa 1986 o o o.- Nonsequential computation and laws of nature.- Linear algorithms for two CMOS layout problems.- Some new results on a restricted channel routing problem.- Efficient modular design of TSC checkers for m-out-of-2m codes.- Vlsi algorithms and pipelined architectures for solving structured linear system.- A high-performance single-chip vlsi signal processor architecture.- Exploiting hierarchy in VLSI design.- A polynomial algorithm for recognizing images of polyhedra.- Parallel tree techniques and code optimization.- AT2-optimal galois field multiplier for VLSI.- Linear and book embeddings of graphs.- Efficient parallel evaluation of straight-line code and arithmetic circuits.- A logarithmic boolean time algorithm for parallel polynomial division.- A polynomial algorithm for recognizing small cutwidth in hypergraphs.- A generalized topological sorting problem.- Combinational static CMOS networks.- Fast and efficient parallel linear programming and linear least squares computations.- On the time required to sum n semigroup elements on a parallel machine with simultaneous writes.- A comparative study of concurrency control methods in B-trees.- Generalized river routing ¿ Algorithms and performance bounds.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 340 pp. Englisch. N° de réf. du vendeur 9783540167662
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VLSI Algorithms and Architectures : Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings
Edité par
Springer Berlin Heidelberg, 1986
ISBN 10 : 3540167668
ISBN 13 : 9783540167662
Neuf
Taschenbuch
Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
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Taschenbuch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - Digital filtering in VLSI.- Two processor scheduling is in NC.- Breaking symmetry in synchronous networks.- Parallel ear decomposition search (EDS) and st-numbering in graphs.- A unifying framework for systolic designs.- Optimal tradeoffs for addition on systolic arrays.- On the connection between hexagonal and unidirectional rectangular systolic arrays.- Lower bounds for sorting on mesh-connected architectures.- Diogenes, circa 1986 o o o.- Nonsequential computation and laws of nature.- Linear algorithms for two CMOS layout problems.- Some new results on a restricted channel routing problem.- Efficient modular design of TSC checkers for m-out-of-2m codes.- Vlsi algorithms and pipelined architectures for solving structured linear system.- A high-performance single-chip vlsi signal processor architecture.- Exploiting hierarchy in VLSI design.- A polynomial algorithm for recognizing images of polyhedra.- Parallel tree techniques and code optimization.- AT2-optimal galois field multiplier for VLSI.- Linear and book embeddings of graphs.- Efficient parallel evaluation of straight-line code and arithmetic circuits.- A logarithmic boolean time algorithm for parallel polynomial division.- A polynomial algorithm for recognizing small cutwidth in hypergraphs.- A generalized topological sorting problem.- Combinational static CMOS networks.- Fast and efficient parallel linear programming and linear least squares computations.- On the time required to sum n semigroup elements on a parallel machine with simultaneous writes.- A comparative study of concurrency control methods in B-trees.- Generalized river routing ¿ Algorithms and performance bounds. N° de réf. du vendeur 9783540167662
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VLSI Algorithms and Architectures | Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings
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Taschenbuch. Etat : Neu. VLSI Algorithms and Architectures | Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings | Fillia Makedon (u. a.) | Taschenbuch | x | Englisch | 1986 | Springer | EAN 9783540167662 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. N° de réf. du vendeur 102149710
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