PAP. Etat : New. New Book. Delivered from our UK warehouse in 4 to 14 business days. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000. N� de r�f. du vendeur L0-9783639027983

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Heterogeneous Mulit-pipeline ASIP

Radhakrishnan, Swarnalatha; Parameswaran, Sri; Guo, Hui

Edit� par VDM Verlag Dr. Mueller E.K., 2008

ISBN 10 : 3639027981 ISBN 13 : 9783639027983

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Vendeur : California Books, Miami, FL, Etats-Unis

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Etat : New. N� de r�f. du vendeur I-9783639027983

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Heterogeneous Multi-pipeline ASIP

Radhakrishnan, Swarnalatha|Parameswaran, Sri|Hui

Edit� par VDM Verlag Dr. M�ller|VDM Verlag Dr. M�ller e.K., 2013

ISBN 10 : 3639027981 ISBN 13 : 9783639027983

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Kartoniert / Broschiert. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Embedded systems are becoming ubiquitous, primarily due to the fast evolution of digital electronic devices. The design of modern embedded systems, requires systems to exhibit, high performance and reliability, yet have short design time and low cost. Appl. N� de r�f. du vendeur 4950691

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Heterogeneous Multi-pipeline ASIP : Design and Implementation

Swarnalatha Radhakrishnan

Edit� par VDM Verlag Dr. M�ller, VDM Verlag Dr. M�ller E.K., 2008

ISBN 10 : 3639027981 ISBN 13 : 9783639027983

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Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne

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Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Embedded systems are becoming ubiquitous, primarily due to the fast evolution of digital electronic devices. The design of modern embedded systems, requires systems to exhibit, high performance and reliability, yet have short design time and low cost. Application Specific Instruction set processors (ASIPs) are widely used in embedded system since they are economical to use, flexible, and reusable (thus saves design time). During the last decade research work on ASIPs have been carried out in mainly for single pipelined processors. Improving performance in processors is possible by exploring the available parallelism in the program. Designing of multiple parallel execution paths for parallel execution of the processor naturally incurs additional cost. The methodology presented in this book has addressed the problem of improving performance in ASIPs, at minimal additional cost. The devised methodology explores the available parallelism of an application to generate a multi-pipeline heterogeneous ASIP. The processor design is application specific, no pre-defined IPs are used in the design. N� de r�f. du vendeur 9783639027983

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