Dynamic logic circuits have been popularly used in advanced high speed processors as they occupy less area and have higher speed in comparison with the static CMOS counterparts. Domino logic is one of the popular dynamic logic. The major problems with domino gates are higher dynamic power, static power and lower noise immunity than static logic circuits. In this work, an attempt has been made to design novel circuit techniques for robust, energy-efficient and high performance domino logic circuits in deep submicron technology. All the existing and proposed techniques have been simulated and tested using VLSI back end tools. The logic swing at the output, power dissipation, propagation delay, PDP, area, and noise margins have been evaluated. The study has been carried in 65 nm technology at clock frequencies of 0.05 to 1.5 GHz. The attempt of designing novel circuit techniques for robust, energy-efficient, and high performance domino logic circuits in DSM technology has been achieved. The designed circuits are having better results than the existing circuits in terms of power dissipation, propagation delay, PDP, and noise immunity.
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Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Govindarajulu S.Salendra Govindarajulu is working as a Professor in the Dept. of Electronics & Communication Engg. at RGMCET, Nandyal, Andhra Pradesh, India. He completed B.Tech (ECE) from RGMCET, NANDYAL, JNTUH, A.P., INDIA in 1999. N° de réf. du vendeur 4999449
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Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Dynamic logic circuits have been popularly used in advanced high speed processors as they occupy less area and have higher speed in comparison with the static CMOS counterparts. Domino logic is one of the popular dynamic logic. The major problems with domino gates are higher dynamic power, static power and lower noise immunity than static logic circuits. In this work, an attempt has been made to design novel circuit techniques for robust, energy-efficient and high performance domino logic circuits in deep submicron technology. All the existing and proposed techniques have been simulated and tested using VLSI back end tools. The logic swing at the output, power dissipation, propagation delay, PDP, area, and noise margins have been evaluated. The study has been carried in 65 nm technology at clock frequencies of 0.05 to 1.5 GHz. The attempt of designing novel circuit techniques for robust, energy-efficient, and high performance domino logic circuits in DSM technology has been achieved. The designed circuits are having better results than the existing circuits in terms of power dissipation, propagation delay, PDP, and noise immunity. N° de réf. du vendeur 9783639712810
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Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Dynamic logic circuits have been popularly used in advanced high speed processors as they occupy less area and have higher speed in comparison with the static CMOS counterparts. Domino logic is one of the popular dynamic logic. The major problems with domino gates are higher dynamic power, static power and lower noise immunity than static logic circuits. In this work, an attempt has been made to design novel circuit techniques for robust, energy-efficient and high performance domino logic circuits in deep submicron technology. All the existing and proposed techniques have been simulated and tested using VLSI back end tools. The logic swing at the output, power dissipation, propagation delay, PDP, area, and noise margins have been evaluated. The study has been carried in 65 nm technology at clock frequencies of 0.05 to 1.5 GHz. The attempt of designing novel circuit techniques for robust, energy-efficient, and high performance domino logic circuits in DSM technology has been achieved. The designed circuits are having better results than the existing circuits in terms of power dissipation, propagation delay, PDP, and noise immunity. 244 pp. Englisch. N° de réf. du vendeur 9783639712810
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Vendeur : buchversandmimpf2000, Emtmannsberg, BAYE, Allemagne
Taschenbuch. Etat : Neu. Neuware -Dynamic logic circuits have been popularly used in advanced high speed processors as they occupy less area and have higher speed in comparison with the static CMOS counterparts. Domino logic is one of the popular dynamic logic. The major problems with domino gates are higher dynamic power, static power and lower noise immunity than static logic circuits. In this work, an attempt has been made to design novel circuit techniques for robust, energy-efficient and high performance domino logic circuits in deep submicron technology. All the existing and proposed techniques have been simulated and tested using VLSI back end tools. The logic swing at the output, power dissipation, propagation delay, PDP, area, and noise margins have been evaluated. The study has been carried in 65 nm technology at clock frequencies of 0.05 to 1.5 GHz. The attempt of designing novel circuit techniques for robust, energy-efficient, and high performance domino logic circuits in DSM technology has been achieved. The designed circuits are having better results than the existing circuits in terms of power dissipation, propagation delay, PDP, and noise immunity.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 244 pp. Englisch. N° de réf. du vendeur 9783639712810
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