Much of the research effort in mobile robots in the recent past has been on sensing and design of time-efficient algorithms for tasks such as localization, mapping and navigation. Mobile robots typically employ an embedded computer for high level computations. As applications of robots expand, there is a need to investigate architecturally efficient choices for this embedded computing platform. In particular, it is valuable to process data to obtain time, space and energy-efficient solutions for various robotic tasks.
This book presents hardware-efficient algorithms and FPGA implementations for two robotic tasks, namely exploration and landmark determination. The work identifies scenarios for mobile robotics where parallel processing and selective shutdown offered by FPGAs are invaluable. The book proceeds to systematically develop memory-driven VLSI architectures for both the tasks. The architectures are ported to a low-cost FPGA with a fairly small number of system gates. A robot fabricated with this FPGA on-board serves to validate the efficacy of the approach. Numerous experiments with the robot are reported.
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This book presents hardware-efficient algorithms and FPGA implementations for two robotic tasks, namely exploration and landmark determination. The work identifies scenarios for mobile robotics where parallel processing and selective shutdown offered by FPGAs are invaluable. The book proceeds to systematically develop memory-driven VLSI architectures for both the tasks. The architectures are ported to a low-cost FPGA with a fairly small number of system gates.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
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Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book presents hardware-efficient algorithms and FPGA implementations for two robotic tasks, namely exploration and landmark determination. The work identifies scenarios for mobile robotics where parallel processing and selective shutdown offered by FPGAs are invaluable. The book proceeds to systematically develop memory-driven VLSI architectures for both the tasks. The architectures are ported to a low-cost FPGA with a fairly small number of system gates. 156 pp. Englisch. N° de réf. du vendeur 9783642094651
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Taschenbuch. Etat : Neu. Robotic Exploration and Landmark Determination | Hardware-Efficient Algorithms and FPGA Implementations | K. Sridharan (u. a.) | Taschenbuch | Studies in Computational Intelligence | xiii | Englisch | 2010 | Springer | EAN 9783642094651 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu. N° de réf. du vendeur 107175943
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