Design And Implementation of 4X2 Compressors Using New XNOR Modules: Design of Ultra Low Power Compressors - Couverture souple

Thottempudi, Pardhu

 
9783659851605: Design And Implementation of 4X2 Compressors Using New XNOR Modules: Design of Ultra Low Power Compressors
Couverture souple
ISBN 10 : 3659851604 ISBN 13 : 9783659851605
Editeur : LAP LAMBERT Academic Publishing, 2016

Synopsis

I present a new design for a 1-bit fUll adder featuring hybrid-CMOS design style. My approach achieves low-energy operations in 90nm technology. Hybrid-CMOS design style makes use of various CMOS Iogic style circuits to build new ull adders with desired specifcations. The new SERF- full adder (FA) circuit optimized for ultra low power operation is based on modifed XOR gates with clock gating to minimize the power consumption. And also generales full-swing outputs simultaneously. The new full-adder circuit successfuUy operates at low voltages with excellent signal integrity. The new adder displayed better power and delay metrics as compared to the standard ull adders. To evalºate the performance of the new full adder in a real circuit, we realized 4-2,5-2,5-3,7-2,11-2,15-4,31-5 compressors which are basically used in multiplier modules of DSP filters. Simulated results using 90nm standarad CMOS technology are provided. The simulation results show a 5% - 20% reduction in power and delay for frequency 50MHz and supply voltages range of 1.1 v.

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Présentation de l'éditeur

I present a new design for a 1-bit fUll adder featuring hybrid-CMOS design style. My approach achieves low-energy operations in 90nm technology. Hybrid-CMOS design style makes use of various CMOS Iogic style circuits to build new ull adders with desired specifcations. The new SERF- full adder (FA) circuit optimized for ultra low power operation is based on modifed XOR gates with clock gating to minimize the power consumption. And also generales full-swing outputs simultaneously. The new full-adder circuit successfuUy operates at low voltages with excellent signal integrity. The new adder displayed better power and delay metrics as compared to the standard ull adders. To evalºate the performance of the new full adder in a real circuit, we realized 4-2,5-2,5-3,7-2,11-2,15-4,31-5 compressors which are basically used in multiplier modules of DSP filters. Simulated results using 90nm standarad CMOS technology are provided. The simulation results show a 5% - 20% reduction in power and delay for frequency 50MHz and supply voltages range of 1.1 v.

Biographie de l'auteur

Thottempudi Pardhu Completed B.Tech in ECE from MLRIT in 2011 and M.Tech in Embedded Systems from Vignan University in 2013,Persuing Ph.D in RADAR SIGNAL Processing from VIT University.He published 20 International papers in reputed journals, conferences.Now he is working as Asst.Prof in the Dept of ECE in St.Peters Engg College, Hyderabad.

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Éditeur
LAP LAMBERT Academic Publishing
Date d'édition
2016
Langue
anglais
ISBN 10 
3659851604
ISBN 13 
9783659851605
Reliure
Broché
Nombre de pages
80
Coordonnées du fabricant
non disponible
Personne responsable
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