CMOS SRAM Design and analysis of low leakage and high speed SRAM cell - Couverture souple

Gupta, Rohin ; Gill, S.S.; Kaur, Navneet

9783659861116: CMOS SRAM Design and analysis of low leakage and high speed SRAM cell

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ISBN 10 : 3659861111 ISBN 13 : 9783659861116

Editeur : LAP LAMBERT Academic Publishing, 2016

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In this work The novel single ended 5T and 6T SRAM cell is presented. This transistor is high density cell or takes less area than conventional 6T SRAM cell. Leakage current of this cell is very low as compared to other 5T or conventional 6T cell. There is a requirement of precharge circuit for this cell as that in conventional 6T SRAM cell. This cell is also power efficient. Also results show that the data stored in this cell is highly stable.There is always scope of improvement in any type of circuit or application. With the proposed configuration we can improve it with various techniques. We can change aspect ratio of the cell for better results. We can apply clock gating for power efficient circuit. We can improve peripheral circuit for better performance.

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�diteur: LAP LAMBERT Academic Publishing
Date d'�dition: 2016
Langue: anglais
ISBN 10: 3659861111
ISBN 13: 9783659861116
Reliure: Broch�
Nombre de pages: 108
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CMOS SRAM Design and analysis of low leakage and high speed SRAM cell

Rohin Gupta

Edit� par LAP LAMBERT Academic Publishing Apr 2016, 2016

ISBN 10 : 3659861111 ISBN 13 : 9783659861116

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Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In this work The novel single ended 5T and 6T SRAM cell is presented. This transistor is high density cell or takes less area than conventional 6T SRAM cell. Leakage current of this cell is very low as compared to other 5T or conventional 6T cell. There is a requirement of precharge circuit for this cell as that in conventional 6T SRAM cell. This cell is also power efficient. Also results show that the data stored in this cell is highly stable.There is always scope of improvement in any type of circuit or application. With the proposed configuration we can improve it with various techniques. We can change aspect ratio of the cell for better results. We can apply clock gating for power efficient circuit. We can improve peripheral circuit for better performance. 108 pp. Englisch. N� de r�f. du vendeur 9783659861116

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CMOS SRAM Design and analysis of low leakage and high speed SRAM cell

Gupta, Rohin; Gill, S.S.; Kaur, Navneet

Edit� par LAP LAMBERT Academic Publishing, 2016

ISBN 10 : 3659861111 ISBN 13 : 9783659861116

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CMOS SRAM Design and analysis of low leakage and high speed SRAM cell

Gupta, Rohin; Gill, S.S.; Kaur, Navneet

Edit� par LAP LAMBERT Academic Publishing, 2016

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CMOS SRAM Design and analysis of low leakage and high speed SRAM cell

Rohin Gupta|S.S. Gill|Navneet Kaur

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Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Gupta RohinRohin Gupta is research scholar at GNDEC,Ludhiana and chairman of Brainiac Solutions firm (www.brainiacsolutions.in). Professor Sandeep Singh Gill is working as Professor and Head in ECE Department at GNDEC, Ludhiana.Navne. N� de r�f. du vendeur 158877267

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CMOS SRAM Design and analysis of low leakage and high speed SRAM cell

Gupta, Rohin; Gill, S.S.; Kaur, Navneet

Edit� par LAP LAMBERT Academic Publishing, 2016

ISBN 10 : 3659861111 ISBN 13 : 9783659861116

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CMOS SRAM Design and analysis of low leakage and high speed SRAM cell

Rohin Gupta

Edit� par LAP LAMBERT Academic Publishing, 2016

ISBN 10 : 3659861111 ISBN 13 : 9783659861116

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Paperback. Etat : Brand New. 108 pages. 8.66x5.91x0.25 inches. In Stock. N� de r�f. du vendeur 3659861111

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CMOS SRAM Design and analysis of low leakage and high speed SRAM cell

Rohin Gupta

Edit� par LAP LAMBERT Academic Publishing Apr 2016, 2016

ISBN 10 : 3659861111 ISBN 13 : 9783659861116

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Taschenbuch. Etat : Neu. This item is printed on demand - Print on Demand Titel. Neuware -In this work The novel single ended 5T and 6T SRAM cell is presented. This transistor is high density cell or takes less area than conventional 6T SRAM cell. Leakage current of this cell is very low as compared to other 5T or conventional 6T cell. There is a requirement of precharge circuit for this cell as that in conventional 6T SRAM cell. This cell is also power efficient. Also results show that the data stored in this cell is highly stable.There is always scope of improvement in any type of circuit or application. With the proposed configuration we can improve it with various techniques. We can change aspect ratio of the cell for better results. We can apply clock gating for power efficient circuit. We can improve peripheral circuit for better performance.VDM Verlag, Dudweiler Landstra�e 99, 66123 Saarbr�cken 108 pp. Englisch. N� de r�f. du vendeur 9783659861116

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CMOS SRAM Design and analysis of low leakage and high speed SRAM cell

Rohin Gupta

Edit� par LAP LAMBERT Academic Publishing, 2016

ISBN 10 : 3659861111 ISBN 13 : 9783659861116

Neuf Taschenbuch

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Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne

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Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - In this work The novel single ended 5T and 6T SRAM cell is presented. This transistor is high density cell or takes less area than conventional 6T SRAM cell. Leakage current of this cell is very low as compared to other 5T or conventional 6T cell. There is a requirement of precharge circuit for this cell as that in conventional 6T SRAM cell. This cell is also power efficient. Also results show that the data stored in this cell is highly stable.There is always scope of improvement in any type of circuit or application. With the proposed configuration we can improve it with various techniques. We can change aspect ratio of the cell for better results. We can apply clock gating for power efficient circuit. We can improve peripheral circuit for better performance. N� de r�f. du vendeur 9783659861116

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