Design of High Speed 32-Bit Floating Point FFT Processor using FPGA - Couverture souple

Badgujar, Ravindra; Jaware, Tushar; Patil, Jitendra

Couverture souple

ISBN 10 : 3659882496 ISBN 13 : 9783659882494

Editeur : LAP LAMBERT Academic Publishing, 2016

Synopsis

The Discrete Fourier Transform (DFT) is used in a wide variety of Digital Signal Processing applications. The algorithm used to implement this transform requires intensive arithmetic computation as well as complex control and sequence functions.The designer of VLSI components is faced with problem of identifying requirements and architectures for FFT algorithm which directly support the DFT. Design goals of this book includes 32-bit floating point FFT calculation in IEEE 754 single Precision number format with very high speed. This book focuses on design, simulation, synthesis and implementation of 32-bit Floating point FFT algorithm in Radix 2 DIT form implemented on virtex II pro FPGA. FPGAs as programmable hardware devices are particularly suitable to encompass both high processing speeds and flexibility to meet the quickly changing DSP designs. Particularly, this book has revealed that the FFT algorithm for DSP-based systems can be efficiently implemented by using Virtex II Pro FPGA with a high speed.

A propos du livre

À propos de l'auteur

Authors obtained their Master of Engineering in Digital Electronics from Sant Gadge Baba Amravati University, Amravati. They completed their B.E.in E&TC Engineering from North Maharashtra University, Jalgaon. They have 11 Years of teaching and research experience.Their area of interest includes Image Processing, Computer Networks and VLSI.

Détails de l'édition

• Éditeur: LAP LAMBERT Academic Publishing
• Date d'édition: 2016
• Langue: anglais
• ISBN 10: 3659882496
• ISBN 13: 9783659882494
• Reliure: Broché
• Nombre de pages: 64
• Coordonnées du fabricant: non disponible
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