Efficient and Flexible Cryptographic Co-processor Architecture - Couverture souple

Laue, Ralf

9783838102870: Efficient and Flexible Cryptographic Co-processor Architecture

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ISBN 10 : 3838102878 ISBN 13 : 9783838102870

Editeur : Sudwestdeutscher Verlag Fur Hochschulschriften AG, 2008

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�diteur: Sudwestdeutscher Verlag Fur Hochschulschriften AG
Date d'�dition: 2008
Langue: anglais
ISBN 10: 3838102878
ISBN 13: 9783838102870
Reliure: Broch�
Nombre de pages: 160
Coordonn�es du fabricant: non disponible
Personne responsable: info@bod.de
info@bod.de

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Efficient and Flexible Cryptographic Co-ProcessorArchitecture

Laue, Ralf

Edit� par S�dwestdeutscher Verlag f�r Hochschulschriften, 2015

ISBN 10 : 3838102878 ISBN 13 : 9783838102870

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Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. In todays networks security is becoming more and more important. Public Key Cryptography, which is a necessary building block for this, places a high workload on the server in client-server networks. A co-processor can be used to shoulder some of this workl. N� de r�f. du vendeur 5404681

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Efficient and Flexible Cryptographic Co-Processor Architecture

Ralf Laue

Edit� par S�dwestdeutscher Verlag F�r Hochschulschriften Jan 2009, 2009

ISBN 10 : 3838102878 ISBN 13 : 9783838102870

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Taschenbuch. Etat : Neu. This item is printed on demand - Print on Demand Titel. Neuware -In todays networks security is becoming more and more important. Public Key Cryptography, which is a necessary building block for this, places a high workload on the server in client-server networks. A co-processor can be used to shoulder some of this workload. However, as the networks become increasingly heterongenous, the server must also be able to communicate with clients utilizing different cryptographic schemes. Thus, the two main design goals for such a co-processor are efficiency and flexibility. In context of server application, efficiency is measured as high throughput instead of low latency. Flexibility aims for the support of different cryptographic schemes and an easy expandability. This work proposes a generic co-processor architecture for RSA, Elliptic Curve Cryptography, and Pairing-Based Cryptography, which utilizes a combined HW/SW-design allowing high flexibility without sacrificing efficiency. Based on a new classification of parallelization possibilities, it exploits parallelization on all abstraction levels as long as this furthers throughput. The feasibility and usefulness of the architecture is verified by means of a prototype implementation.VDM Verlag, Dudweiler Landstra�e 99, 66123 Saarbr�cken 160 pp. Deutsch. N� de r�f. du vendeur 9783838102870

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Efficient and Flexible Cryptographic Co-Processor Architecture : Focussing on Server Application

Ralf Laue

Edit� par S�dwestdeutscher Verlag F�r Hochschulschriften AG Co. KG, 2008

ISBN 10 : 3838102878 ISBN 13 : 9783838102870

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Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne

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Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - In todays networks security is becoming more and more important. Public Key Cryptography, which is a necessary building block for this, places a high workload on the server in client-server networks. A co-processor can be used to shoulder some of this workload. However, as the networks become increasingly heterongenous, the server must also be able to communicate with clients utilizing different cryptographic schemes. Thus, the two main design goals for such a co-processor are efficiency and flexibility. In context of server application, efficiency is measured as high throughput instead of low latency. Flexibility aims for the support of different cryptographic schemes and an easy expandability. This work proposes a generic co-processor architecture for RSA, Elliptic Curve Cryptography, and Pairing-Based Cryptography, which utilizes a combined HW/SW-design allowing high flexibility without sacrificing efficiency. Based on a new classification of parallelization possibilities, it exploits parallelization on all abstraction levels as long as this furthers throughput. The feasibility and usefulness of the architecture is verified by means of a prototype implementation. N� de r�f. du vendeur 9783838102870

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