Verification of Temporal Properties in Embedded Software: based on Assertion and Semiformal Verification Approaches - Couverture souple

Lettnin, Djones

 
9783838112077: Verification of Temporal Properties in Embedded Software: based on Assertion and Semiformal Verification Approaches
Couverture souple
ISBN 10 : 3838112075 ISBN 13 : 9783838112077
Editeur : Suedwestdeutscher Verlag fuer Hochschulschriften, 2010

Synopsis

For some years ago the main statement among verification engineers was "Bugs in hardware cost money". Nowadays, the embedded software is playing an important role in the embedded systems industry and the statement can be updated to "Bugs in hardware and in software cost a lot of money". Embedded software is very powerful in embedded systems in order to implement important functionalities and functional innovations. The developing costs of embedded software are becoming huge and its amount in safety critical systems is increasing. Therefore, the verification of complex systems needs to consider the verification of both hardware and embedded software modules. The most commonly used approaches to verify embedded software are based on co- simulation or on co-debugging, which consume long verification time and additionally have coverage limitations. Formal verification assures complete coverage, but is limited to the size of the module that can be verified. This dissertation extends the conventional verification limitations with methodologies that are based on temporal properties and formal verification.

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Présentation de l'éditeur

For some years ago the main statement among verification engineers was "Bugs in hardware cost money". Nowadays, the embedded software is playing an important role in the embedded systems industry and the statement can be updated to "Bugs in hardware and in software cost a lot of money". Embedded software is very powerful in embedded systems in order to implement important functionalities and functional innovations. The developing costs of embedded software are becoming huge and its amount in safety critical systems is increasing. Therefore, the verification of complex systems needs to consider the verification of both hardware and embedded software modules. The most commonly used approaches to verify embedded software are based on co- simulation or on co-debugging, which consume long verification time and additionally have coverage limitations. Formal verification assures complete coverage, but is limited to the size of the module that can be verified. This dissertation extends the conventional verification limitations with methodologies that are based on temporal properties and formal verification.

Biographie de l'auteur

Djones Lettnin has Master's in Electric Engineering at Catholic University of Rio Grande do Sul (2004), Brazil, and PhD. in Computer Engineering at the Eberhard Karls University of Tübingen (2009), Germany. He has interest in design and veri?cation of embedded systems.

Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.

Éditeur
Suedwestdeutscher Verlag fuer Hochschulschriften
Date d'édition
2010
Langue
anglais
ISBN 10 
3838112075
ISBN 13 
9783838112077
Reliure
Broché
Nombre de pages
160
Coordonnées du fabricant
non disponible
Personne responsable
non disponible