System-Level Software and Architectural Support for NoC-based MPSoCs: A HW-SW Component View for Many-core Systems - Couverture souple

Joven, Jaume; Castells-Rufas, David; Carrabina, Jordi

 
9783838334127: System-Level Software and Architectural Support for NoC-based MPSoCs: A HW-SW Component View for Many-core Systems
Couverture souple
ISBN 10 : 3838334124 ISBN 13 : 9783838334127
Editeur : LAP LAMBERT Academic Publishing, 2011

Synopsis

On high-performance embedded computing, we are witnessing the trend to integrate multiple cores in Multi-Processor Systems-on-Chip (MPSoCs). Networks- on-chip (NoCs) have been proposed to be a scalable, predictable and flexible paradigm to design complex NoC-based Many-core MPSoCs. However, since the number of cores increases exponentially, new challenges such as the design of suitable NoCs, and how to exploit parallelism on a chip arise. In this book, we showour EDA tool (xENoC - NoCMaker) that allows design, simulation and fast-prototype of NoC-based systems, as well as the trade-offs on the design of Network Interfaces (NI) to provide interoperability between cores of different protocols (AMBA/OCP-IP) with Quality-of-Service (QoS) support at a reasonable power and area costs. In the second part, the book tries to shed light on system-level software, runtime QoS support and middleware APIs, and a MPI-like parallel programming model (ocMPI), which offers SW programmers a way to express message-passing parallelism on NoC-based MPSoCs. This book should be especially useful for researchers on the field of parallel embedded computing on many- core on-chip systems.

Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.

Présentation de l'éditeur

On high-performance embedded computing, we are witnessing the trend to integrate multiple cores in Multi-Processor Systems-on-Chip (MPSoCs). Networks- on-chip (NoCs) have been proposed to be a scalable, predictable and flexible paradigm to design complex NoC-based Many-core MPSoCs. However, since the number of cores increases exponentially, new challenges such as the design of suitable NoCs, and how to exploit parallelism on a chip arise. In this book, we showour EDA tool (xENoC - NoCMaker) that allows design, simulation and fast-prototype of NoC-based systems, as well as the trade-offs on the design of Network Interfaces (NI) to provide interoperability between cores of different protocols (AMBA/OCP-IP) with Quality-of-Service (QoS) support at a reasonable power and area costs. In the second part, the book tries to shed light on system-level software, runtime QoS support and middleware APIs, and a MPI-like parallel programming model (ocMPI), which offers SW programmers a way to express message-passing parallelism on NoC-based MPSoCs. This book should be especially useful for researchers on the field of parallel embedded computing on many- core on-chip systems.

Biographie de l'auteur

Mr. Jaume Joven received his M.Sc. (2004) and Ph.D degree (2009) in Computer Science from Universitat Autònoma de Barcelona (UAB). His research interests are focused on HW-SW design of NoC-based MPSoCs, ranging from circuit design up to system-level SW, runtime middleware and parallel programming models. He is currently a postdoc at EPFL.

Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.

Éditeur
LAP LAMBERT Academic Publishing
Date d'édition
2011
Langue
anglais
ISBN 10 
3838334124
ISBN 13 
9783838334127
Reliure
Broché
Nombre de pages
228
Coordonnées du fabricant
non disponible
Personne responsable
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